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2 Meg x 8 Smart 5 Even-Sectored Flash Memory Micron Technology, Inc., reserves the right to change products or specifications without notice.
F42.p65 – Rev. 1/00 ©2000, Micron Technology, Inc.
ADVANCE
2 MEG x 8
SMART 5 EVEN-SECTORED FLASH MEMORY
PIN DESCRIPTIONS
TSOP PIN
NUMBERS SYMBOL TYPE DESCRIPTION
38 WE# Input Write Enable: Determines if a given cycle is a WRITE cycle. If WE# is LOW,
the cycle is either a WRITE to the command execution logic (CEL) or to the
memory array.
9 CE# Input Chip Enable: Activates the device when LOW. When CE# is HIGH, the
device is disabled and goes into standby power mode.
12 RP# Input Reset/Power-Down: When LOW, RP# clears the status register, sets the
internal state machine (ISM) to the array read mode and places the device
in deep power-down mode. All inputs, including CE#, are “Don’t Care,”
and all outputs are High-Z. RP# must be held at VIH during all other modes
of operation.
37 OE# Input Output Enable: Enables data output buffers when LOW. When OE# is
HIGH, the output buffers are disabled.
24, 23, 22, 21, A0-A20 Input Address Inputs: Select a unique, 8-bit byte out of the 2,097,152
20, 19, 18, 17, available.
16, 15, 14, 13,
8, 7, 6, 5, 4, 3,
2, 1, 40
25-28, DQ0-DQ7 Input/ Data I/Os: Data output pins during any READ operation or data input
32-35 Output pins during a WRITE. Used to input commands to the CEL.
36 RY/BY# Output Ready/Busy: Indicates the status of the ISM. When RY/BY# = VOL, the ISM is
busy processing a command. If RY/BY# = VOH, the ISM is ready to accept a
new command. During deep power-down, device configuration read or
erase suspend, RY/BY# = VOH. Output is always active.
11 VPP Supply Write/Erase Supply Voltage: From a WRITE or ERASE CONFIRM until
completion of the operation, VPP must be at VPPH (5V) (VPP • VCC). VPP =
“Don’t Care” during all other operations.
10, 31 VCC Supply Power Supply: +5V ±10%.
29, 30 VSS Supply Ground.
39 NC – No Connect: This pin may be driven or left unconnected.
