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SY10E404JC

Part # SY10E404JC
Description IC GATE AND/NAND QUAD 28-PLCC
Category IC
Availability In Stock
Qty 5
Qty Price
1 - 1 $9.47108
2 - 2 $7.53381
3 - 3 $7.10331
4 + $6.60106
Manufacturer Available Qty
SYNERGY
Date Code: 9611
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DESCRIPTION
FEATURES
Differential D and Q
Extended 100E V
EE range of –4.2V to –5.5V
700ps max. propagation delay
High frequency outputs
Internal 75K input pull-down resistors
Fully compatible with Motorola 10E/100E404
Available in 28-pin PLCC package
The SY10/100E404 are 4-bit differential AND/NAND
devices. The differential operation of these devices make
them ideal for pulse shaping applications where duty cycle
skew is critical. Special design techniques were
incorporated to minimize the skew between the upper
and lower level gate inputs.
Because a negative 2-input NAND function is
equivalent to a 2-input OR function, the differential inputs
and outputs of the devices also allow for their use as
fully differential 2-input OR/NOR functions.
The output RISE/FALL times of these devices are
significantly faster than most other standard ECLinPS
devices, resulting in an increased bandwidth.
The differential inputs have clamp structures which
will force the Q output of a gate in an open input condition
to go to a LOW state. Thus, inputs of unused gates can
be left open and will not affect the operation of the rest
of the device.
QUAD DIFFERENTIAL
AND/NAND
Rev.: D Amendment: /1
Issue Date: February, 1998
SY10E404
SY100E404
BLOCK DIAGRAM
D0a
D0a
D0b
D0b
Q0
Q0
D1a
D1a
D1b
D1b
Q1
Q1
D2a
D2a
D2b
D2b
Q2
Q2
D3a
D3a
D3b
D3b
Q3
Q3
PIN CONFIGURATION
Pin Function
D[0:4], D[0:4] Differential Data Inputs
Q[0:4], Q[0:4] Differential Data Outputs
V
CCO VCC to Output
PIN NAMES
18
17
16
15
14
13
12
567891011
26
27
28
1
2
3
4
TOP VIEW
PLCC
J28-1
25
24 23 22 21 20 19
D2b
VEE
D2a
D2b
D2a
D1b
D1b
Q2
VCC
Q1
Q0
Q2
Q1
Q0
D0b
D0a
VCCO
D1a
D1a
D0b
D0a
Q3
D3b
D3a
D3a
VCCO
D3b
Q3
1
2
SY10E404
SY100E404
Micrel
TRUTH TABLE
Da Db Q Da Db Q
LL L L LL
LH L L HH
HL L H LH
HH H H HH
DC ELECTRICAL CHARACTERISTICS
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
IIH Input HIGH Current 150 150 150 µA—
I
EE Power Supply Current mA
10E 106 127 106 127 106 127
100E 106 127 106 127 122 146
VPP (DC) Input Sensitivity 50 50 50 mV 1
V
CMR Common Mode Range –1.5 0 –1.5 0 –1.5 0 V 2
NOTES:
1. Differential input voltage required to obtain a full ECL swing on the outputs.
2. VCMR is referenced to the most positive side of the differential input signal. Normal operation is obtained when the input signals are within the VCMR range
and the input swing is greater than VPP (min.) and <1V.
AC ELECTRICAL CHARACTERISTICS
VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
t
PLH Propagation Delay to Output ps
tPHL Da (Diff) 350 475 650 350 475 650 350 475 650
Da (SE) 300 475 700 300 475 700 300 475 700
Db (Diff) 375 500 675 375 500 675 375 500 675
Db (SE) 325 500 725 325 500 725 325 500 725
tskew Within-Device Skew 50 50 50 ps 1
VPP(AC) Minimum Input Swing 150 150 150 mV 2
t
r Rise/Fall Time 150 400 150 400 150 400 ps
tf 20–80%
NOTES:
1. Within-device skew is defined as identical transitions on similar paths
through a device.
2. Minimum input swing for which AC parameters are guaranteed.
PRODUCT ORDERING CODE
Ordering Package Operating
Code Type Range
SY10E404JC J28-1 Commercial
SY10E404JCTR J28-1 Commercial
SY100E404JC J28-1 Commercial
SY100E404JCTR J28-1 Commercial
3
SY10E404
SY100E404
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
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