3597H–DFLASH–02/07

AT45DB321D [Preliminary]

9. Hardware Controlled Protection

Sectors specified for protection in the Sector Protection Register and the Sector Protection Reg-

ister itself can be protected from program and erase operations by asserting the WP

pin and

keeping the pin in its asserted state. The Sector Protection Register and any sector specified for

protection cannot be erased or reprogrammed as long as the WP

pin is asserted. In order to

modify the Sector Protection Register, the WP

pin must be deasserted. If the WP pin is perma-

nently connected to GND, then the content of the Sector Protection Register cannot be changed.

If the WP

pin is deasserted, or permanently connected to V

, then the content of the Sector

Protection Register can be modified.

The WP

pin will override the software controlled protection method but only for protecting the

sectors. For example, if the sectors were not previously protected by the Enable Sector Protec-

tion command, then simply asserting the WP

pin would enable the sector protection within the

maximum specified t

WPE

time. When the WP pin is deasserted; however, the sector protection

would no longer be enabled (after the maximum specified t

WPD

time) as long as the Enable Sec-

tor Protection command was not issued while the WP

pin was asserted. If the Enable Sector

Protection command was issued before or while the WP

pin was asserted, then simply deassert-

ing the WP

pin would not disable the sector protection. In this case, the Disable Sector

Protection command would need to be issued while the WP

pin is deasserted to disable the sec-

tor protection. The Disable Sector Protection command is also ignored whenever the WP

pin is

asserted.

A noise filter is incorporated to help protect against spurious noise that may inadvertently assert

or deassert the WP

pin.

The table below details the sector protection status for various scenarios of the WP

pin, the

Enable Sector Protection command, and the Disable Sector Protection command.

Figure 9-1. WP

Pin and Protection Status

Table 9-1. WP Pin and Protection Status

Time

Period WP Pin

Enable Sector Protection

Command

Disable Sector

Protection Command

Sector Protection

Status

Sector

Protection

1High

Command Not Issued Previously

–

Issue Command

–

Disabled

Enabled

Read/Write

2 Low X X Enabled Read Only

3High

Command Issued During Period 1

or 2

–

Issue Command

Not Issued Yet

Issue Command

–

Enabled

Disabled

Enabled

Read/Write

3597H–DFLASH–02/07

AT45DB321D [Preliminary]

9.1 Sector Protection Register

The nonvolatile Sector Protection Register specifies which sectors are to be protected or unpro-

tected with either the software or hardware controlled protection methods. The Sector Protection

specify whether sectors 0 through 63 will be protected or unprotected. The Sector Protection

illustrates the format of the Sector Protection Register.:

Note: 1. The default value for bytes 0 through 63 when shipped from Atmel is 00H.

x = don’t care.

Table 9-2. Sector Protection Register

Sector Number 0 (0a, 0b) 1 to 63

Protected

See Table 9-3

FFH

Unprotected 00H

Table 9-3. Sector 0 (0a, 0b)

0a 0b

Bit 3, 2

Data

Value

(Pages 0-7) (Pages 8-127)

Bit 7, 6 Bit 5, 4 Bit 1, 0

Sectors 0a, 0b Unprotected 00 00 xx xx 0xH

Protect Sector 0a (Pages 0-7) 11 00 xx xx CxH

Protect Sector 0b (Pages 8-127) 00 11 xx xx 3xH

Protect Sectors 0a (Pages 0-7), 0b

(Pages 8-127)

(1)

11 11 xx xx FxH

3597H–DFLASH–02/07

AT45DB321D [Preliminary]

9.1.1 Erase Sector Protection Register Command

In order to modify and change the values of the Sector Protection Register, it must first be

erased using the Erase Sector Protection Register command.

To erase the Sector Protection Register, the CS

pin must first be asserted as it would be with

any other command. Once the CS

pin has been asserted, the appropriate 4-byte opcode

sequence must be clocked into the device via the SI pin. The 4-byte opcode sequence must

start with 3DH and be followed by 2AH, 7FH, and CFH. After the last bit of the opcode sequence

has been clocked in, the CS

pin must be deasserted to initiate the internally self-timed erase

cycle. The erasing of the Sector Protection Register should take place in a time of t

, during

which time the Status Register will indicate that the device is busy. If the device is powered-

down before the completion of the erase cycle, then the contents of the Sector Protection Regis-

ter cannot be guaranteed.

The Sector Protection Register can be erased with the sector protection enabled or disabled.

Since the erased state (FFH) of each byte in the Sector Protection Register is used to indicate

that a sector is specified for protection, leaving the sector protection enabled during the erasing

of the register allows the protection scheme to be more effective in the prevention of accidental

programming or erasing of the device. If for some reason an erroneous program or erase com-

mand is sent to the device immediately after erasing the Sector Protection Register and before

the register can be reprogrammed, then the erroneous program or erase command will not be

processed because all sectors would be protected.

Figure 9-2. Erase Sector Protection Register

Command Byte 1 Byte 2 Byte 3 Byte 4

Erase Sector Protection Register 3DH 2AH 7FH CFH

Opcode

Byte 1

Opcode

Byte 2

Opcode

Byte 3

Opcode

Byte 4

Each transition

represents 8 bits

Part #	AT45DB321D-MU
Description	FLASH, 32MB, DFN-8, Memory Size:32Mbit, Flash Memory Confi
Category	IC
Availability	Out of Stock
Qty	0

AT45DB321D-MU

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