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5011

Part # 5011
Description TRANSFRMR VARIABLE 0-140AC 50A
Category Microcircuit
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Using the TPS84410EVM-001,
TPS84210EVM-002, TPS84610EVM-003
User's Guide
Literature Number: SLUU633A
September 2011Revised February 2012
User's Guide
SLUU633ASeptember 2011Revised February 2012
TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003,
2-A to 6-A Integrated Power Solution
1 Introduction
The TPS84410EVM-001, TPS84210EVM-002, TPS84610EVM-003 Evaluation Module
(TPS84x10EVM-00x) is designed as an easy to use platform that facilitates an extensive evaluation of the
features and performance of the Integrated Power Solution (IPS) devices. The EVM PCB may be
configured with one of three IPS devices (see Table 1).
Table 1. TPS84x10EVM-00x Device Configuration
DEVICE TITLE
TPS84210 6-V input, 2-A output sync. step-down converter with PWM
TPS84410 6-V input, 4-A output sync. step-down converter with PWM
TPS84610 6-V input, 6-A output sync. step-down converter with PWM
This user guide provides information on the correct usage of the EVM and an explanation of the numerous
test points on the board.
2 Description
The EVM features a TPS84x10 synchronous buck IPS device configured for operation with typical 3.3-V
and 5-V input bus applications. The output voltage can be set to one of five popular values by using a
simple configuration jumper. In similar fashion, the switching frequency can be set to one of four values by
use of a jumper. The full 4-A rated output current can be supplied by the EVM. A minimal amount of input
and output capacitance is used on the board. Component pads are provided for additional input and
output capacitors if desired. Monitoring test points are provided to allow measurement of efficiency, power
dissipation, input ripple, output ripple, line and load regulation, and transient response. Control test points
are provided for use of the PWRGD, Inhibit/UVLO, synchronization, and slow-start/tracking features of the
IPS device. The EVM uses a recommended PCB layout that maximizes thermal performance and
minimizes output ripple and noise.
2
TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to 6-A SLUU633ASeptember 2011 Revised February 2012
Integrated Power Solution
Submit Documentation Feedback
Copyright © 20112012, Texas Instruments Incorporated
www.ti.com
Getting Started
3 Getting Started
Figure 1 highlights the user interface items associated with the EVM. The polarized V
IN
Power terminal
block is used for connection to the host input supply and the polarized V
OUT
Power terminal block is used
for connection to the load. The terminal blocks can except up to 16 AWG wire.
The V
IN
monitor and V
OUT
monitor test points located near the power terminal blocks are intended to be
used as voltage monitoring points where voltmeters can be connected to measure V
IN
and V
OUT
. The
voltmeter references should be connected to any of the four V
IN
/V
OUT
monitor grounds test points located
between the power terminal blocks. Do not use these V
IN
and V
OUT
monitoring test points as the input
supply or output load connection points. The PCB traces connecting to these test points are not designed
to support high currents.
Figure 1. TPS84x10EVM-00x User Interface
3
SLUU633A September 2011 Revised February 2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to 6-A
Integrated Power Solution
Submit Documentation Feedback
Copyright © 20112012, Texas Instruments Incorporated
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