C,IN(RMS)

[ I

OUT

IN,

MIN

OUT

DS(on)

OUT

(OFF,min)

OUT

SCHOTTKY

OUT

ON,

MIN

OUT

DS(on)

OUT

ON,

MIN

OUT

SCHOTTKY

OUT

OFF,

MIN

PMOS(RMS)

[ I

OUT

+ I

OUT

(cond)

OUT

DS(on)

1)TC

*25°C

[

OUT

DS(on)

TPS75003

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

www.ti.com

Note that the capacitors must be able to handle the RMS current in continuous conduction mode, which can be

calculated using Equation 4:

(4)

Inductor Value Selection (Buck Controllers)

The inductor is chosen based on inductance value and maximum current rating. Larger inductors reduce current

ripple (and therefore, output voltage ripple) but are physically larger and more expensive. Inductors with lower

DC resistance typically improve efficiency, but also have higher cost and larger physical size. The buck

converters work well with inductor values between 4.7mH and 47mH in most applications. When selecting an

inductor, the current rating should exceed the current limit set by R

or R

DS,ON

(see the Current Limit section). To

determine the minimum inductor size, first determine if the device will operate in minimum on-time or minimum

off-time mode. The device will operate in minimum on-time mode if Equation 5 is satisfied:

(5)

where R

= the inductor DC resistance.

Minimum inductor size needed when operating in minimum on-time mode is given by Equation 6:

(6)

Minimum inductor size needed when operating in minimum off-time mode is given by Equation 7:

(7)

where ΔI

= (20%–30%) x I

OUT-MAX

External PMOS Transistor Selection (Buck Controllers)

The external PMOS transistor is selected based on threshold voltage (V

), on-resistance (R

DS,ON

), gate

capacitance (C

) and voltage rating. The PMOS V

magnitude must be much lower than the lowest voltage at

IN1 or IN2 that will be used. A V

magnitude that is 0.5V less than the lowest input voltage is normally sufficient.

The PMOS gate will see voltages from 0V to the maximum input voltage, so gate-to-source breakdown should be

a few volts higher than the maximum input supply. The drain-to-source of the device will also see this full voltage

swing, and should therefore be a few volts higher than the maximum input supply. The RMS current in the PMOS

can be estimated by using Equation 8:

(8)

The power dissipated in the PMOS is comprised of both conduction and switching losses. Switching losses are

typically insignificant. The conduction losses are a function of the RMS current and the R

DS,ON

of the PMOS, and

are calculated by Equation 9:

(9)

Product Folder Link(s): TPS75003

(

diode

)

(RMS)

[ I

OUT

(

1*D

)

+ I

OUT

+ DI ƪESR)

8 C

OUT

ƫ[ 1.1DI ESR

OUT

L DI

OUT

TPS75003

www.ti.com

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

Diode Selection (Buck Controllers)

The diode is off when the PMOS is on, and on when the PMOS is off. Since it will be turned on and off at a

relatively high frequency, a Schottky diode is recommended for good performance. The peak current rating of the

diode should exceed the peak current limit set by the sense resistor R

IS1,2

. A diode with low reverse leakage

current and low forward voltage at operating current will optimize efficiency. Equation 10 calculates the estimated

average power dissipation:

(10)

Output Capacitor Selection (Buck Controllers)

The output capacitor is selected based on output voltage ripple and transient response requirements. As a result

of the nature of the hysteretic control loop, a minimum ESR of a few tens of mΩ should be maintained for good

operation unless a feed-forward resistor is used. Low ESR bulk tantalum or PosCap capacitors work best in most

applications. A 1.0mF ceramic capacitor can be used in parallel with this capacitor to filter higher frequency

spikes. The output voltage ripple can be estimated by Equation 11:

(11)

To calculate the capacitance needed to achieve a given voltage ripple as a result of a load transient from zero

output to full current, use Equation 12:

(12)

If only ceramic or other very low ESR output capacitor configurations are desired, additional voltage ripple must

be passed to the feedback pin. See Application Note SLVA210, Using Ceramic Output Capacitors with the

TPS6420x and TPS75003 Buck Controllers, available for download at www.ti.com, for detailed application

information.

Output Voltage Ripple Effect on V

OUT

(Buck Controllers)

Output voltage ripple causes V

OUT

to be higher or lower than the target value by half of the peak-to-peak voltage

ripple. For minimum on-time, the ripple adds to the voltage; for minimum off-time, it subtracts from the voltage.

Soft-Start Capacitor Selection (Buck Controllers)

The soft-start for BUCK1 and BUCK2 is not intended to be a precision function. However, the startup time (from

a positive transition on Enable to V

OUT

reaching its final value) has a linear relationship to C

up to

approximately 800pF, which results in a startup time of approximately 4ms. Above this value of C

, the variation

in start-up time increases rapidly. This variation can occur from unit to unit and even between the two BUCK

controllers in one device. Therefore, do not depend on the soft-start feature for sequencing multiple supplies if

values of C

greater than 800pF are used.

BUCK1 is discussed in this section; it is identical to BUCK2. Soft-start is implemented on the buck controllers by

ramping current limit from 0 to its target value (set by R1) over a user-defined time. This time is set by the

external soft-start cap connected to pin SS1. If SS1 is left open, a small on-chip capacitor will provide a current

limit ramp time of approximately 250ms. Figure 25 shows the effects of R1 and SS1 on the current limit start-up

ramp.

Product Folder Link(s): TPS75003

3.0A

Current

Limit

0.7A

Time

R1 = 33mΩ

R1 = 143mΩ

SS1

= 0.022µF

SS1

= 0.022µF

SS1

= 0.01µF

SS1

= 0.01µF

OUT

+ V

TPS75003

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

www.ti.com

Figure 25. Effects of C

SS1

and R

on Current Ramp Limit

This soft-start current limit ramp can be used to provide inrush current control or output voltage ramp control.

While the current limit ramp can be easily understood by looking at Figure 25, the output voltage ramp is a

complex function of many variables. The dominant variables in this process are V

OUT1

, C

SS1

, I

OUT1

, and R

. Less

important variables are V

IN1

and L

The best way to set a target start-up time is through bench measurement under target conditions, adjusting C

SS1

to get the desired startup profile. To stay above a minimum start-up time, set the nominal start-up time to

approximately five times the minimum. To stay below a maximum time, set the nominal start-up time at one-fifth

of the maximum. Fastest start-up times occur at maximum V

IN1

, with minimum V

OUT1

, L

, C

OUT1

, C

SS1

, and I

OUT1

Slowest start-up times occur under opposite conditions.

Refer to Figure 10 to Figure 14 for characterization curves showing how the start-up profile is affected by these

critical parameters.

Output Voltage Setting Selection (Buck Controllers)

Output voltage is set using two resistors as shown for Buck2 in Figure 1. Output voltage is then calculated using

Equation 13:

(13)

where V

= 1.22V.

LDO OPERATION

The TPS75003 LDO uses a PMOS pass element and is offered in an adjustable version for ease of

programming to any output voltage. When used to power V

CC,AUX

it is set to 2.5V; it can optionally be set to other

output voltages to power other circuitry. The LDO has integrated soft-start, independent enable, and short-circuit

and thermal protection. The LDO can be used to power V

CC,AUX

on the Xilinx Spartan-3 FPGA when 3.3V JTAG

signals are used as described in Application Note SLVA159 (available for download from www.ti.com).

Input Capacitor Selection (LDO)

Although an input capacitor is not required, it is good analog design practice to connect a 0.1mF to 10mF low ESR

capacitor across the input supply near the regulator. This capacitor counteracts reactive input sources and

improves transient response, stability, and ripple rejection. A higher value capacitor may be needed if large, fast

rise-time load transients are anticipated, or if the device is located far from its power source.

Product Folder Link(s): TPS75003

Part #	TPS75003RHLT
Description	INTERGRATED POWER MANAGEMENTIC - Cut TR (SOS)
Category	IC
Availability	In Stock
Qty	37

Qty	Price
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32 +	$1.77470

Manufacturer	Available	Qty
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TPS75003RHLT

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