TPS75201Q, TPS75215Q, TPS75218Q, TPS75225Q, TPS75233Q WITH RESET
TPS75401Q, TPS75415Q, TPS75418Q, TPS75425Q, TPS75433Q WITH POWER GOOD
FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS242B – MARCH 2000 – REVISED JUNE 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV
at an output current of 2 A for the TPS75x33Q) and is directly proportional to the output current. Additionally,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications
yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the EN
pin is connected to a low-level input voltage. This LDO family also features
a sleep mode; applying a TTL high signal to EN
(enable) shuts down the regulator, reducing the quiescent
current to 1 µA at T
J
= 25°C.
The RESET
(SVS, POR, or power on reset) output of the TPS752xxQ initiates a reset in microcomputer and
microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xxQ
monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.
When the output reaches 95% of its regulated voltage, RESET
goes to a high-impedance state after a 100-ms
delay. RESET
goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load
condition) of its regulated voltage.
The TPS754xxQ has a power good terminal (PG) as an active high, open drain output, which can be used to
implement a power-on reset or a low-battery indicator.
The TPS752xxQ or the TPS754xxQ are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in
an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as
a maximum of 2% over line, load, and temperature ranges. The TPS752xxQ and the TPS754xxQ families are
available in 20 pin TSSOP (PWP) packages.
AVAILABLE OPTIONS
TSSOP (PWP)
(TYP)
RESET PG
3.3 V TPS75233QPWP TPS75433QPWP
2.5 V TPS75225QPWP TPS75425QPWP
°
°
1.8 V TPS75218QPWP TPS75418QPWP
1.5 V TPS75215QPWP TPS75415QPWP
Adjustable 1.5 V to 5 V TPS75201QPWP TPS75401QPWP
The TPS75x01 is programmable using an external resistor divider (see application
information). The PWP package is available taped and reeled. Add an R suffix to the device
type (e.g., TPS75201QPWPR) to indicate tape and reel.
†
See application information section for capacitor selection details.
PG or
RESET
OUT
OUT
4
3
5
IN
IN
EN
GND
17
6
8
9
V
I
0.22 µF
PG or RESET
Output
V
O
47 µF
+
C
O
†
SENSE
7
Figure 1. Typical Application Configuration (For Fixed Output Options)
