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TPS75003RHLT

Part # TPS75003RHLT
Description INTERGRATED POWER MANAGEMENTIC - Cut TR (SOS)
Category IC
Availability In Stock
Qty 37
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Texas Instruments
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Texas Instruments
Date Code: 0627
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

TPS75003
SBVS052I –OCTOBER 2004–REVISED AUGUST 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
V
EN1
= V
IN1
, V
EN2
= V
IN2
, V
EN3
= V
IN3
, V
IN1
= V
IN2
= 2.2V, V
IN3
= 3.0V, V
OUT3
= 2.5V, C
OUT1
= C
OUT2
= 47mF, C
OUT3
= 2.2mF,
T
A
= –40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.
PARAMETER CONDITIONS MIN TYP MAX UNIT
LDO
V
OUT3
Output Voltage Range 1.0 6.5 – V
DO
V
V
FB3
Feedback Pin Voltage 0.507 V
Feedback Pin Voltage 2.95V ≤ V
IN3
≤ 6.5V
–4.0 +4.0 %
Accuracy
(4)
1mA ≤ I
OUT3
≤ 300mA
ΔV
OUT%
/ΔV
IN
Line Regulation
(4)
V
OUT3
+ 0.5V ≤ V
IN3
≤ 6.5V 0.075 % / V
ΔV
OUT%
/ΔI
OU
Load Regulation 10mA ≤ I
OUT3
≤ 300mA 0.01 % / mA
T
Dropout Voltage
V
DO
I
OUT3
= 300mA 250 350 mV
(V
IN
= V
OUT(NOM)
– 0.1)
(5)
I
CL3
Current Limit V
OUT
= 0.9 x V
OUT(NOM)
375 600 1000 mA
I
FB3
Current into FB3 pin 0.03 0.1 mA
BW = 100Hz – 100kHz,
V
n
Output Noise 400 mV
RMS
I
OUT3
= 300mA
Shutdown, Temp Increasing 175
Thermal Shutdown Temperature
t
SD
°C
for LDO
Reset, Temp Decreasing 160
Under-Voltage Lockout Threshold V
IN
Rising 1.80 V
UVLO
Under-Voltage Lockout
V
IN
Falling 100 mV
Hysteresis
(4) To be in regulation, minimum V
IN1
(or V
IN2
) must be greater than V
OUT1,NOM
(or V
OUT2,NOM
) by an amount determined by external
components. Minimum V
IN3
= V
OUT3
+ V
DO
or 2.2V, whichever is greater.
(5) V
DO
does not apply when V
OUT
+ V
DO
< 2.2V.
4 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS75003
V
REF1
Soft
Start
Control
Switch
Control
V
IS1
IS1
SW1
FB1
EN1
SS1
IN1
≤
3A Buck Controller
DGND
V
REF2
Soft
Start
Control
Switch
Control
V
IS2
IS2
SW2
FB2
EN2
SS2
IN2
≤
3A Buck Controller
DGND
FB3
OUT3IN3
EN3
SS3
Thermal/
Current
Limit
300mA LDO
V
REF3
AGND
TPS75003
TPS75003
www.ti.com
SBVS052I –OCTOBER 2004–REVISED AUGUST 2010
DEVICE INFORMATION
Functional Block Diagram
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS75003
IN3
OUT3
FB1
FB2
20
1
11
10
DGND
SS3
AGND
EN1
SS1
DGND
SW1
IN1
IS1
19
18
17
16
15
14
13
12
FB3
EN3
EN2
SS2
DGND
SW2
IN2
IS2
2
3
4
5
6
7
8
9
RHL PACKAGE
4.5mm x 3.5mm QFN
(TOP VIEW)
TPS75003
SBVS052I –OCTOBER 2004–REVISED AUGUST 2010
www.ti.com
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME RHL
Ground connection for BUCK1 and BUCK2 converters. Pins 6 and 15 should be connected to the back
DGND 6, 15, PAD
side exposed pad by a short metal trace as shown in the PCB Layout section of this data sheet.
AGND 18 Ground connection for LDO.
IN1 13 Input supply to BUCK1.
IN2 8 Input supply to BUCK2.
IN3 20 Input supply to LDO.
Driving the enable pin (ENx) high turns on BUCK1 regulator. Driving this pin low puts it into shutdown
EN1 17
mode, reducing operating current. The enable pin does not trigger on fast negative going transients.
EN2 4 Same as EN1 but for BUCK2 controller.
EN3 3 Same as EN1 but for LDO.
Connecting a capacitor between this pin and ground increases start-up time of the BUCK1 regulator by
SS1 16 slowing the ramp-up of current limit. This high-impedance pin is noise-sensitive; careful layout is
important. See the Typical Characteristics, Applications, and PCB Layout sections for details.
SS2 5 Same as SS1 but for BUCK2 regulator.
Connecting a capacitor from this pin to ground slows the start-up time of the LDO reference, therby
SS3 19
slowing output voltage ramp-up. See the Applications section for details.
Current sense input for BUCK1 regulator. The voltage difference between this pin and IN1 is compared
IS1 12 to an internal reference to set current limit. For a robust output start-up ramp, careful layout and
bypassing are required. See the Applications section for details.
IS2 9 Same as IS1 but compared to IN2 and used for BUCK2 controller.
SW1 14 Gate drive pin for external BUCK1 P-channel MOSFET.
SW2 7 Same as SW1 but for BUCK2 controller.
FB1 11 Feedback pin. Used to set the output voltage of BUCK1 regulator.
FB2 10 Same as FB1 but for BUCK2 controller.
FB3 2 Same as FB1 but for LDO.
Regulated LDO output. A small ceramic capacitor (≥ 2.2mF) is needed from this pin to ground to ensure
OUT3 1
stability.
6 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS75003
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