IN1

IN2

IN3

EN 1

SS1

EN 2

SS2

EN 3

IS1

SW 1

FB 1

IS2

SW 2

FB 2

OU T3

FB 3

DG ND

BU CK 1

BU CK 2

300m A

LD O

SS3

DGND

AG ND

DGND

TPS75003

CCAUX

2.5Vat300mA

CCO

3.3Vat3A

CCINT

1.2Vat3A

CCAUX

5V _Input

TPS75003

www.ti.com

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

Triple-Supply Power Management IC

for Powering FPGAs and DSPs

Check for Samples: TPS75003

FEATURES

DESCRIPTION

• Two 95% Efficient, 3A Buck Controllers and

The TPS75003 is a complete power management

One 300mA LDO

solution for FPGA, DSP and other multi-supply

applications. The device has been tested with and

• Tested and Endorsed by Xilinx for Powering

meets all of the Xilinx Spartan-3, Spartan-3E and

the Spartan™-3, Spartan-3E and Spartan-3L

Spartan-3L start-up profile requirements, including

FPGAs

monotonic voltage ramp and minimum voltage rail

• Adjustable (1.2V to 6.5V for Bucks, 1.0V to

rise time. Independent Enables for each output allow

6.5V for LDO) Output Voltages on All Channels

sequencing to minimize demand on the power supply

at start-up. Soft-start on each supply limits inrush

• Input Voltage Range: 2.2V to 6.5V

current during start-up. Two integrated buck

• Independent Soft-Start for Each Supply

controllers allow efficient, cost-effective voltage

• Independent Enable for Each Supply for

conversion for both low and high current supplies

Flexible Sequencing

such as core and I/O. A 300mA LDO is integrated to

provide an auxiliary rail such as V

CCAUX

on the Xilinx

• LDO Stable with 2.2mF Ceramic Output Cap

Spartan-3 FPGA. All three supply voltages are

• Small, Low-Profile 4.5mm x 3.5mm x 0.9mm

offered in user-programmable options for maximum

QFN Package

flexibility.

The TPS75003 is fully specified from –40°C to +85°C

APPLICATIONS

and is offered in a QFN package, yielding a highly

• FPGA/DSP/ASIC Supplies

compact total solution size with high power

• Set-Top Boxes

dissipation capability.

• DSL Modems

• Plasma TV Display Panels

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Spartan is a trademark of Xilinx, Inc.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS75003

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

(1)

PRODUCT V

OUT

Buck1: Adjustable

TPS75003 Buck2: Adjustable

LDO: Adjustable

(1) For the most current specifications and package information, see the Package Option Addendum located at the end of this document, or

see the TI website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

Over operating free-air temperature range (unless otherwise noted)

(1)

TPS75003 UNIT

INX

range (IN1, IN2, IN3) –0.3 to +7.0 V

ENX

range (EN1, EN2, EN3) –0.3 to V

INX

+0.3 V

SWX

range (SW1, SW2, SW3) –0.3 to V

INX

+0.3 V

ISX

range (IS1, IS2, IS3) –0.3 to V

INX

+0.3 V

OUT3

range –0.3 to +7.0 V

SSX

range (SS1, SS2, SS3) –0.3 to V

INX

+0.3 V

FBX

range (FB1, FB2, FB3) –0.3 to +3.3 V

Peak LDO output current (I

OUT3

) Internally limited —

Continuous total power dissipation See Dissipation Ratings Table —

Junction temperature range, T

–55 to +150 °C

Storage temperature range –65 to +150 °C

ESD rating, HBM 1 kV

ESD rating, CDM 500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics

is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

THERMAL INFORMATION

TPS75003

THERMAL METRIC

(1)(2)

UNITS

RHL (20 PINS)

Junction-to-ambient thermal resistance 42.6

JCtop

Junction-to-case (top) thermal resistance 51.8

Junction-to-board thermal resistance 39.5

°C/W

Junction-to-top characterization parameter 0.6

Junction-to-board characterization parameter 14.2

JCbot

Junction-to-case (bottom) thermal resistance 2.8

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

Product Folder Link(s): TPS75003

TPS75003

www.ti.com

SBVS052I –OCTOBER 2004–REVISED AUGUST 2010

ELECTRICAL CHARACTERISTICS

EN1

= V

IN1

, V

EN2

= V

IN2

, V

EN3

= V

IN3

, V

IN1

= V

IN2

= 2.2V, V

IN3

= 3.0V, V

OUT3

= 2.5V, C

OUT1

= C

OUT2

= 47mF, C

OUT3

= 2.2mF,

= –40°C to +85°C, unless otherwise noted. Typical values are at T

= +25°C.

PARAMETER CONDITIONS MIN TYP MAX UNIT

Supply and Logic

Input Voltage Range

INX

2.2 6.5 V

(IN1, IN2, IN3)

(1)

Quiescent Current, I

= I

DGND

OUT1

= I

OUT2

= 0mA, I

OUT3

= 1mA 75 150 mA

AGND

SHDN

Shutdown Supply Current V

EN1

= V

EN2

= V

EN3

= 0V 0.05 3.0 mA

Enable High, enabled

IH1, 2

1.4 V

INX

(EN1, EN2)

IH3

Enable High, enabled (EN3) 1.14 V

IN3

Enable Low, shutdown

ILX

0 0.3 V

(EN1, EN2, EN3)

Enable pin current

ENX

0.01 0.5 mA

(EN1, EN2, EN3)

Buck Controllers 1 and 2

Adjustable Output Voltage

OUT1,2

FBX

INX

Range

(2)

FB1,2

Feedback Voltage (FB1, FB2) 1.220 V

Feedback Voltage Accuracy

(1)

–2 +2 %

(FB1, FB2)

FB1,2

Current into FB1, FB2 pins 0.01 0.5 mA

Reference Voltage for Current

IS1,2

80 100 120 mV

Sense

IS1,2

Current into IS1, IS2 Pins 0.01 0.5 mA

Measured with the circuit in Figure 1,

ΔV

OUT%

/ΔV

Line Regulation

(1)

0.1 % / V

OUT

+ 0.5V ≤ V

≤ 6.5V

ΔV

OUT%

/ΔI

Measured with the circuit in Figure 1,

Load Regulation 0.6 % / A

30mA ≤ I

OUT

≤ 2A

Measured with the circuit in Figure 1,

1,2

Efficiency

(3)

94 %

OUT

= 1A

Measured with the circuit in Figure 1,

STR1,2

Startup Time

(3)

5 ms

= 6Ω, C

OUT

= 100mF, C

= 2.2nF

Gate Driver P-Channel and V

IN1,2

> 2.5V 4

DS,ON1,2

N-Channel MOSFET Ω

IN1,2

= 2.2V 6

On-Resistance

Gate Driver P-Channel and

SW1,2

N-Channel MOSFET Drive 100 mA

Current

Minimum On Time 1.36 1.55 1.84 ms

OFF

Minimum Off Time 0.44 0.65 0.86 ms

(1) To be in regulation, minimum V

IN1

(or V

IN2

) must be greater than V

OUT1,NOM

(or V

OUT2,NOM

) by an amount determined by external

components. Minimum V

IN3

= V

OUT3

+ V

or 2.2V, whichever is greater.

(2) Maximum V

OUT

depends on external components and will be less than V

(3) Depends on external components.

Product Folder Link(s): TPS75003

Part #	TPS75003RHLT
Description	INTERGRATED POWER MANAGEMENTIC - Cut TR (SOS)
Category	IC
Availability	In Stock
Qty	37

Qty	Price
1 - 7	$2.72080
8 - 15	$2.16427
16 - 23	$2.04060
24 - 31	$1.89631
32 +	$1.69019

Manufacturer	Available	Qty
Texas Instruments Date Code: 0627	Freelance Stock: 29 Ships Immediately
Texas Instruments	Freelance Stock: 8 Ships Immediately

TPS75003RHLT

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