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SNJ54ABT377W

Part # SNJ54ABT377W
Description Flip Flop D-Type Bus Interface Pos-Edge 1-Element 20-Pin C
Category IC
Availability In Stock
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Qty Price
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3 + $17.95072
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Texas Instruments
Date Code: 9521
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN54ABT377, SN74ABT377
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156B – FEBRUARY 1991 – REVISED JULY 1994
Copyright 1994, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
State-of-the-Art
EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25°C
High-Drive Outputs (–32-mA I
OH
,
64-mA I
OL
)
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic
Chip Carriers (FK), and Plastic (N) and
Ceramic (J) DIPs
description
The ABT377 are 8-bit positive-edge-triggered
D-type flip-flops with a clock (CLK) input. They are
particularly suitable for implementing buffer and
storage registers, shift registers, and pattern
generators.
Data (D) input information that meets the setup
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse if the
common clock-enable (CLKEN
) input is low. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the buffered clock
(CLK) input is at either the high or low level, the
D input signal has no effect at the output. The
circuits are designed to prevent false clocking by
transitions at CLKEN
.
The SN74ABT377 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT377 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT377 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
CLKEN CLK D
Q
H X X Q
0
L HH
L LL
X H or L X Q
0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLKEN
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
SN54ABT377 ...J PACKAGE
SN74ABT377 ... DB, DW, OR N PACKAGE
(TOP VIEW)
3212019
9
10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
SN54ABT377 . . . FK PACKAGE
(TOP VIEW)
1D
1Q
CLKEN
5Q
5D
8Q
4Q
GND
CLK
V
CC
8D
7D
7Q
6Q
6D
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54ABT377, SN74ABT377
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156B – FEBRUARY 1991 – REVISED JULY 1994
2–2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
13
5D
14
6D
17
7D
18
8D
1Q
2
2Q
5
3Q
6
4Q
9
1C2
CE
G1
1
11
CLK
2D
3
1D
4
2D
7
3D
8
4D
5Q
12
6Q
15
7Q
16
8Q
19
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1D
11
1Q
1D
C1
CLK
CLKEN
1
3
2
To Seven Other Channels
SN54ABT377, SN74ABT377
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156B – FEBRUARY 1991 – REVISED JULY 1994
2–3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state or power-off state, V
O
0.5 V to 5.5 V. . . . . . . . . . . . .
Current into any output in the low state, I
O
: SN54ABT377 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT377 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0) 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at T
A
= 55°C (in still air) (see Note 2): DB package 0.6 W. . . . . . . . . . . . . . . . . . . .
DW package 1.6 W. . . . . . . . . . . . . . . . . . .
N package 1.3 W. . . . . . . . . . . . . . . . . . . . .
Storage temperature range 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero. For more information, refer to the
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS Technology Data Book
, literature number SCBD002B.
recommended operating conditions (see Note 3)
SN54ABT377 SN74ABT377
UNIT
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 4.5 5.5 4.5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
V
I
Input voltage 0 V
CC
0 V
CC
V
I
OH
High-level output current –24 –32 mA
I
OL
Low-level output current 48 64 mA
t/v Input transition rise or fall rate 5 5 ns/V
T
A
Operating free-air temperature –55 125 –40 85 °C
NOTE 3: Unused or floating inputs must be held high or low.
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