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SNJ5400W

Part # SNJ5400W
Description NAND Gate 4-Element 2-IN Bipolar 14-Pin CFPAK Tube
Category IC
Availability In Stock
Qty 4
Qty Price
1 - 2 $11.63320
3 + $8.81303
Manufacturer Available Qty
Texas Instruments
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

  
  
   
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Package Options Include Plastic
Small-Outline (D, NS, PS), Shrink
Small-Outline (DB), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J) DIPs
D Also Available as Dual 2-Input
Positive-NAND Gate in Small-Outline (PS)
Package
SN5400 ...J PACKAGE
SN54LS00, SN54S00 ...J OR W PACKAGE
SN7400, SN74S00 . . . D, N, OR NS PACKAGE
SN74LS00 . . . D, DB, N, OR NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
SN5400 ...W PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
V
CC
2Y
2A
2B
4Y
4B
4A
GND
3B
3A
3Y
SN74LS00, SN74S00 ...PS PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
V
CC
2B
2A
2Y
1A
1B
1Y
GND
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
1B
1A
NC
3Y
3A
V
4B
2Y
GND
NC
SN54LS00, SN54S00 . . . FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
description/ordering information
These devices contain four independent 2-input NAND gates. The devices perform the Boolean function
Y = A
B or Y = A + B in positive logic.
Copyright 2003, Texas Instruments Incorporated
   ! "#$ !  %#&'" ($)
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$!.  '' %$$!)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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  
  
   
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SN7400N SN7400N
PDIP − N Tube
SN74LS00N SN74LS00N
PDIP − N
Tube
SN74S00N SN74S00N
Tube SN7400D
7400
Tape and reel SN7400DR
7400
SOIC − D
Tube SN74LS00D
LS00
SOIC − D
Tape and reel SN74LS00DR
LS00
0°C to 70°C
Tube SN74S00D
S00
0 C to 70 C
Tape and reel SN74S00DR
S00
SN7400NSR SN7400
SOP − NS Tape and reel
SN74LS00NSR 74LS00
SOP − NS
Tape and reel
SN74S00NSR 74S00
SOP − PS
Tape and reel
SN74LS00PSR LS00
SOP − PS Tape and reel
SN74S00PSR S00
SSOP − DB Tape and reel SN74LS00DBR LS00
SNJ5400J SNJ5400J
CDIP − J Tube
SNJ54LS00J SNJ54LS00J
CDIP − J
Tube
SNJ54S00J SNJ54S00J
−55°C to 125°C
SNJ5400W SNJ5400W
−55°C to 125°C
CFP − W Tube
SNJ54LS00W SNJ54LS00W
CFP − W
Tube
SNJ54S00W SNJ54S00W
LCCC − FK
Tube
SNJ54LS00FK SNJ54LS00FK
LCCC − FK
Tube
SNJ54S00FK SNJ54S00FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B
OUTPUT
Y
H H L
L XH
X L H
logic diagram, each gate (positive logic)
A
B
Y
  
  
   
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
schematic
’00
GND
Y
130
V
CC
4 k
A
1.6 k
1 k
B
V
CC
Resistor values shown are nominal.
Y
GND
3 k
4 k
120
8 k20 k
1.5 k
12 k
A
B
2.8 k 900
B
A
500
250
3.5 k
’LS00 ’S00
V
CC
Y
GND
50
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