
MSP430x22x2, MSP430x22x4
MIXED SIGNAL MICROCONTROLLER
SLAS504B − JULY 2006 − REVISED JULY 2007
69
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
Port P3 pin schematic: P3.1 to P3.5, input/output with Schmitt trigger
Bus
Keeper
EN
Direction
0: Input
1: Output
P3SEL.x
1
0
P3DIR.x
P3IN.x
D
EN
Module X IN
1
0
Module X OUT
P3OUT.x
P3.1/UC1SIMO/UC1SCL
P3.2/UC1SOMI/UC1SDA
P3.3/UC1CLK/UC0STE
P3.4/UC0TXD/UC0SIMO
P3.5/UC0RXD/UC0SOMI
1
0
DVSS
DVCC
P3REN.x
Pad Logic
1
USCI Direction
Control
DVSS
Port P3 (P3.1 to P3.5) pin functions
CONTROL BITS / SIGNALS
PIN NAME (P3.X)
X FUNCTION
P3DIR.x P3SEL.x
P3.1/ 1 P3.1† (I/O) I: 0; O: 1 0
UC1SIMO/UC1SDA
UC1SIMO/UC1SDA (see Note 3) X 1
P3.2/ 1 P3.2† (I/O) I: 0; O: 1 0
UC1SOMI/UC1SCL
UC1SOMI/UC1SCL (see Note 3) X 1
P3.3/ 1 P3.3† (I/O) I: 0; O: 1 0
UC1CLK/UC0STE
UC1CLK/UC0STE (see Notes 3, 4) X 1
P3.4/ 1 P3.4† (I/O) I: 0; O: 1 0
UC0TXD/UC0SIMO
UC0TXD/UC0SIMO (see Note 3) X 1
P3.5/ 1 P3.5† (I/O) I: 0; O: 1 0
UC0RXD/UC0SOMI
UC0RXD/UC0SOMI (see Note 3) X 1
†
Default after reset (PUC/POR)
NOTES: 1. N/A: Not available or not applicable
2. X: Don’t care
3. The pin direction is controlled by the USCI module.
4. UC1CLK function takes precedence over UC0STE function. If the pin is required as UC1CLK input or output USCI0 will be forced
to 3-wire SPI mode even if 4-wire SPI mode is selected.