SNVS295F –MAY 2004–REVISED APRIL 2013
LP2997 DDR-II Termination Regulator
Check for Samples: LP2997
The LP2997 linear regulator is designed to meet the
• Source and Sink Current
JEDEC SSTL-18 specifications for termination of
• Low Output Voltage Offset
DDR-II memory. The device contains a high-speed
• No External Resistors Required
operational amplifier to provide excellent response to
load transients. The output stage prevents shoot
• Linear Topology
through while delivering 500mA continuous current
• Suspend to Ram (STR) Functionality
and transient peaks up to 900mA in the application as
• Low External Component Count
required for DDR-II SDRAM termination. The LP2997
also incorporates a V
pin to provide superior
• Thermal Shutdown
load regulation and a V
output as a reference for
• Available in SOIC-8, SO PowerPAD-8 Packages
the chipset and DIMMs.
An additional feature found on the LP2997 is an
active low shutdown (SD) pin that provides Suspend
• DDR-II Termination Voltage
To RAM (STR) functionality. When SD is pulled low
• SSTL-18 Termination
output will tri-state providing a high
impedance output, but, V
will remain active. A
power savings advantage can be obtained in this
mode through lower quiescent current.
Typical Application Circuit
Figure 1. Typical Application Circuit
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.