February, 2013 − Rev. 26

1 Publication Order Number:

CAT24C01/D

CAT24C01, CAT24C02,

CAT24C04, CAT24C08,

CAT24C16

1-Kb, 2-Kb, 4-Kb, 8-Kb and

16-Kb I

C CMOS Serial

EEPROM

Description

The CAT24C01/02/04/08/16 are 1−Kb, 2−Kb, 4−Kb, 8−Kb and

16−Kb respectively CMOS Serial EEPROM devices organized

internally as 8/16/32/64 and 128 pages respectively of 16 bytes each.

All devices support both the Standard (100 kHz) as well as Fast

(400 kHz) I

C protocol.

Data is written by providing a starting address, then loading 1 to 16

contiguous bytes into a Page Write Buffer, and then writing all data to

non−volatile memory in one internal write cycle. Data is read by

providing a starting address and then shifting out data serially while

automatically incrementing the internal address count.

External address pins make it possible to address up to eight

CAT24C01 or CAT24C02, four CAT24C04, two CAT24C08 and one

CAT24C16 device on the same bus.

Features

• Supports Standard and Fast I

C Protocol

• 1.7 V to 5.5 V Supply Voltage Range

• 16−Byte Page Write Buffer

• Hardware Write Protection for Entire Memory

• Schmitt Triggers and Noise Suppression Filters on I

C Bus Inputs

(SCL and SDA)

• Low power CMOS Technology

• More than 1,000,000 Program/Erase Cycles

• 100 Year Data Retention

• Industrial and Extended Temperature Range

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

SDA

SCL

CAT24C__

16 / 08 / 04 / 02 / 01

////

NC NC

////

PIN CONFIGURATION

PDIP (L), SOIC (W), TSSOP (Y), MSOP (Z),

* The TDFN (VP2) package is not recommended for new designs.

TDFN, (VP2)*, UDFN−EP (HU4) (Top View)

See detailed ordering and shipping information in the package

dimensions section on page 19 of this data sheet.

ORDERING INFORMATION

http://onsemi.com

SOIC−8

W SUFFIX

CASE 751BD

TSOT−23

TD SUFFIX

CASE 419AE

PDIP−8

L SUFFIX

CASE 646AA

TSSOP−8

Y SUFFIX

CASE 948AL

MSOP−8

Z SUFFIX

CASE 846AD

TDFN−8*

VP2 SUFFIX

CASE 511AK

SDA

SCL

TSOT−23 (TD), TSOP−5** (TS) (Top View)

PIN CONFIGURATIONS

UDFN8−EP

HU4 SUFFIX

CASE 517AZ

WLCSP−4***

C4A SUFFIX

CASE 567DC

WLCSP−5***

C5A SUFFIX

CASE 567DD

*** WLCSP are available for the CAT24C04,

CAT24C08 and CAT24C16 only.

TOP MARKING FOR WLCSP

X = Specific Device

X = Code

4 = 24C04

8 = 24C08

6 = 24C16

Y = Production Year (Last Digit)

M = Production Month (1−9, O, N, D)

WLCSP−4 WLCSP−5

WLCSP−4*** WLCSP−5***

(Top Views)

WP SCL

SDA

SCL SDA

Pin 1

12312

Pin 1

X X

Y M Y M

Pin 1

(Ball Down)

Pin 1

TSOP−5**

TS SUFFIX

CASE 483

** TSOP are available for the CAT24C02 only.

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

http://onsemi.com

SCL

CAT24Cxx

Figure 1. Functional Symbol

SDA

, A

Table 1. PIN FUNCTION

Pin Name

†

Function

A0, A1, A2 Device Address Input

SDA Serial Data Input/Output

SCL Serial Clock Input

WP Write Protect Input

Power Supply

Ground

NC No Connect

†The exposed pad for the TDFN/UDFN packages can be left floating

or connected to Ground.

Table 2. ABSOLUTE MAXIMUM RATINGS

Parameters Ratings Units

Storage Temperature −65 to +150 °C

Voltage on any pin with respect to Ground (Note 1) −0.5 to +6.5 V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. During input transitions, voltage undershoot on any pin should not exceed −1 V for more than 20 ns. Voltage overshoot on pins A

, A

and WP should not exceed V

+ 1 V for more than 20 ns, while voltage on the I

C bus pins, SCL and SDA, should not exceed the absolute

maximum ratings, irrespective of V

Table 3. RELIABILITY CHARACTERISTICS (Note 2)

Symbol

Parameter Min Units

END

(Note 3) Endurance 1,000,000 Program / Erase Cycles

Data Retention 100 Years

2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100

and JEDEC test methods.

3. Page Mode, V

= 5 V, 25°C.

Table 4. D.C. OPERATING CHARACTERISTICS

= 1.8 V to 5.5 V, T

= −40°C to +125°C and V

= 1.7 V to 5.5 V, T

= −40°C to +85°C, unless otherwise specified.)

Symbol

Parameter Test Conditions Min Max Units

CCR

Read Current Read, f

SCL

= 400 kHz 1 mA

CCW

Write Current Write, f

SCL

= 400 kHz 2 mA

Standby Current All I/O Pins at GND or V

= −40°C to +85°C

≤ 3.3 V

1 mA

= −40°C to +85°C

> 3.3 V

= −40°C to +125°C 5

I/O Pin Leakage Pin at GND or V

Input Low Voltage −0.5 0.3 x V

Input High Voltage

, A

and WP 0.7 x V

+ 0.5

SCL and SDA 0.7 x V

5.5

Output Low

Voltage

> 2.5 V, I

= 3 mA 0.4

< 2.5 V, I

= 1 mA 0.2

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

http://onsemi.com

Table 5. PIN IMPEDANCE CHARACTERISTICS

= 1.8 V to 5.5 V, T

= −40°C to +125°C and V

= 1.7 V to 5.5 V, T

= −40°C to +85°C, unless otherwise specified.)

Symbol

Parameter Conditions Max Units

(Note 4)

SDA Pin Capacitance

= 0 V, f = 1.0 MHz, V

= 5.0 V

8 pF

Other Pins 6 pF

(Note 5) WP Input Current

< V

, V

= 5.5 V 130 mA

< V

, V

= 3.3 V 120

< V

, V

= 1.7 V 80

> V

(Note 5) Address Input Current

(A0, A1, A2)

Product Rev H: CAT24C02

Product Rev K: CAT24C04,

CAT24C08, CAT24C16

< V

, V

= 5.5 V 50 mA

< V

, V

= 3.3 V 35

< V

, V

= 1.7 V 25

> V

4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100

and JEDEC test methods.

5. When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is

relatively strong; therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To

conserve power, as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak

current source.

Table 6. A.C. CHARACTERISTICS

(Note 6) (V

= 1.8 V to 5.5 V, T

= −40°C to +125°C and V

= 1.7 V to 5.5 V, T

= −40°C to +85°C, unless otherwise specified.)

Symbol

Parameter

Standard Fast

Units

Min Max Min Max

SCL

Clock Frequency 100 400 kHz

HD:STA

START Condition Hold Time 4 0.6

LOW

Low Period of SCL Clock 4.7 1.3

HIGH

High Period of SCL Clock 4 0.6

SU:STA

START Condition Setup Time 4.7 0.6

HD:DAT

Data In Hold Time 0 0

SU:DAT

Data In Setup Time 250 100 ns

SDA and SCL Rise Time 1000 300 ns

(Note 6) SDA and SCL Fall Time 300 300 ns

SU:STO

STOP Condition Setup Time 4 0.6

BUF

Bus Free Time Between STOP and START 4.7 1.3

SCL Low to Data Out Valid 3.5 0.9

Data Out Hold Time 100 100 ns

(Note 6) Noise Pulse Filtered at SCL and SDA Inputs 100 100 ns

SU:WP

WP Setup Time 0 0

HD:WP

WP Hold Time 2.5 2.5

Write Cycle Time 5 5 ms

(Notes 7, 8) Power−up to Ready Mode 1 1 ms

6. Test conditions according to “AC Test Conditions” table.

7. Tested initially and after a design or process change that affects this parameter.

8. t

is the delay between the time V

is stable and the device is ready to accept commands.

Part #	CAT24C04WI-G
Description	EEPROM Serial-I2C 4K-bit 512x 8 1.8V/2.5V/3.3V/5V 8-Pin S
Category	IC
Availability	In Stock
Qty	39

CAT24C04WI-G

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