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AD8361ARMZ

Part # AD8361ARMZ
Description MINSO DC-2.5GHZ TRUE PWR DETECTOR/CNTRLR
Category IC
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Analog Devices
Date Code: 1122
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

AD8361
Rev. C | Page 19 of 24
One of the AD8361s (U2) has a net gain of about 14 dB
preceding it and therefore operates most accurately at low input
signal levels. This is referred to as the weak signal path. U4, on
the other hand, does not have the added gain and provides
accurate response at high levels. The output of U2 is attenuated
by R1 in order to cancel the effect of U2’s preceding gain so that
the slope of the transfer function (as seen at the slider of R1) is
the same as that of U4 by itself.
2.5 GHz. However, it is necessary to calibrate for a given
application to accommodate for the change in conversion gain
at higher frequencies.
Dynamic Range Extension for the AD8361
The accurate measurement range of the AD8361 is limited by
internal dc offsets for small input signals and by square law
conformance errors for large signals. The measurement range
may be extended by using two devices operating at different
signal levels and then choosing only the output of the device
that provides accurate results at the prevailing input level.
The circuit comprising U3, U5, and U6 is a crossfader, in which
the relative gains of the two inputs are determined by the output
currents of a fuzzy comparator made from Q1 and Q2.
Assuming that the slider of R2 is at 2.5 V dc, the fuzzy
comparator commands full weighting of the weak signal path
when the output of U2 is below about 2.0 V dc, and full
weighting of the strong signal path when the output of U3
exceeds about 3.0 V dc. U3 and U5 are OTAs (operational
transconductance amplifiers).
Figure 60 depicts an implementation of this idea. In this circuit,
the selection of the output is made gradually over an input level
range of about 3 dB in order to minimize the impact of
imperfect matching of the transfer functions of the two
AD8361s. Such a mismatch typically arises because of the
variation of the gain of the RF preamplifier U1 and both the
gain and slope variations of the AD8361s with temperature.
8
7
6
5
1
2
3
4
AD8361
0.1µF
5V
100pF
5V
0.01µF
68
U2
ERA-3
20dB
U1
RFC
270
12V
6dB
PA D
6dB
SPLITTER
RF
INPUT
12V
20k
1k 1k
5V
R2
10k
Q2
2N3906
Q1
2N3906
16k
R1
5k
CA3080
+12V
–5V
U3
20k
CA3080
+12V
–5V
U5
2
3
5
6
2
3
5
6
20k
1M
R3
10k
–5V
+5V
12k
8
7
6
5
1
2
3
4
AD8361
0.1µF
5V
100pF
5V
0.01µF
68
U4
AD820
5V
U6
2
3
8.2nF
4
7
6
V
OUT
100
01088-C-060
Figure 60. Range Extender Application
AD8361
Rev. C | Page 20 of 24
U6 provides feedback to linearize the inherent tanh transfer
function of the OTAs. When one OTA or the other is fully
selected, the feedback is very effective. The active OTA has zero
differential input; the inactive one has a potentially large
differential input, but this does not matter because the inactive
OTA is not contributing to the output. However, when both
OTAs are active to some extent, and the two signal inputs to the
crossfader are different, it is impossible to have zero differential
inputs on the OTAs. In this event, the crossfader admittedly
generates distortion because of the nonlinear transfer function
of the OTAs. Fortunately, in this application, the distortion is
not very objectionable for two reasons:
1.
The mismatch in input levels to the crossfader is never
large enough to evoke very much distortion because the
AD8361s are reasonably well-behaved.
2.
The effect of the distortion in this case is merely to distort
the otherwise nearly linear slope of the transition between
the crossfaders two inputs.
V
OUT
m
1
m
2
m
1
m
2
DIFFERING
SLOPES INDICATE
MALADJUSTMENT
OF R1
RF INPUT LEVEL – V rms
TRANSITION
REGION
01088-C-061
Figure 61. Slope Adjustment
This circuit has three trimmable potentiometers. The suggested
setup procedure is as follows:
1.
Preset R3 at midrange.
2.
Set R2 so that its slider’s voltage is at the middle of the
desired transition zone (about 2.5 V dc is recommended).
3.
Set R1 so that the transfer functions slopes are equal on
both sides of the transition zone. This is perhaps best
accomplished by making a plot of the overall transfer
function (using linear voltage scales for both axes) to assess
the match in slope between one side of the transition
region and the other (see Figure 61). Note: it may be
helpful to adjust R3 to remove any large misalignment in
the transfer function in order to correctly perceive slope
differences.
4.
Finally (re)adjust R3 as required to remove any remaining
misalignment in the transfer function (see Figure 62).
V
OUT
RF INPUT LEVEL – V rms
TRANSITION
REGION
MISALIGNMENT INDICATES
MALADJUSTMENT OF R3
01088-C-062
Figure 62. Intercept Adjustment
In principle, this method could be extended to three or more
AD8361s in pursuit of even more measurement range. However,
it is very important to pay close attention to the matter of not
excessively overdriving the AD8361s in the weaker signal paths
under strong signal conditions.
Figure 63 shows the extended range transfer function at multiple
temperatures. The discontinuity at approximately 0.2 V rms arises
as a result of component temperature dependencies. Figure 64
shows the error in dB of the range extender circuit at ambient
temperature. For a 1 dB error margin, the range extender circuit
offers 38 dB of measurement range.
DRIVE LEVEL (V rms)
3.0
2.5
0
0 1.00.2
V
OUT
(V)
0.4 0.6 0.8
2.0
1.5
1.0
0.5
REF LINE
+80°C
–30°C
01088-C-063
Figure 63. Output vs. Drive Level over Temperature for
a 1 GHz 64 QAM Modulated Signal
DRIVE LEVEL (dBm)
5
–32
ERROR (dB)
4
3
2
1
0
–1
–2
–3
–4
–5
–27 –22 –17 –12 –7 –2 3 8 13
01088-C-064
Figure 64. Error from Linear Reference at 25°C for a
1 GHz 64 QAM Modulated Signal
AD8361
Rev. C | Page 21 of 24
EVALUATION BOARD
Figure 65 and Figure 68 show the schematic of the AD8361
evaluation board. Note that uninstalled components are drawn
in as dashed. The layout and silkscreen of the component side
are shown in Figure 66, Figure 67, Figure 69, and Figure 70. The
board is powered by a single supply in the 2.7 V to 5.5 V range.
The power supply is decoupled by 100 pF and 0.01 µF
capacitors. Additional decoupling, in the form of a series
resistor or inductor in R6, can also be added. Table 8 details the
various configuration options of the evaluation board.
Table 8. Evaluation Board Configuration Options
Component Function Default Condition
TP1, TP2 Ground and Supply Vector Pins. Not Applicable
SW1
Device Enable. When in Position A, the PWDN pin is connected to +V
S
and the AD8361 is in power-
down mode. In Position B, the PWDN pin is grounded, putting the device in operating mode.
SW1 = B
SW2/SW3
Operating Mode. Selects either ground reference mode, internal reference mode or supply
reference mode. See Table 4 for more details.
SW2 = A, SW3 = B
(Ground Reference Mode)
C1, R2
Input Coupling. The 75 Ω resistor in Position R2 combines with the AD8361’s internal input
impedance to give a broadband input impedance of around 50 Ω. For more precise matching
at a particular frequency, R2 can be replaced by a different value (see Input Coupling and
Matching and Figure 43 through Figure 46).
Capacitor C1 ac couples the input signal and creates a high-pass input filter whose corner
frequency is equal to approximately 8 MHz. C1 can be increased for operation at lower
frequencies. If resistive attenuation is desired at the input, series resistor R1, which is
nominally 0 Ω, can be replaced by an appropriate value.
R2 = 75 Ω (Size 0402)
C1 = 100 pF (Size 0402)
C2, C3, R6
Power Supply Decoupling. The nominal supply decoupling of 0.01 µF and 100 pF. A series
inductor or small resistor can be placed in R6 for additional decoupling.
C2 = 0.01 µF (Size 0402)
C3 = 100 pF (Size 0402)
R6 = 0 Ω (Size 0402)
C5
Filter Capacitor. The internal 50 pF averaging capacitor can be augmented by placing a
capacitance in C5.
C5 = 1 nF (Size 0603)
C4, R5 Output Loading. Resistors and capacitors can be placed in C4 and R5 to load test V rms. C4 = R5 = Open (Size 0603)
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