Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

AD8361ARMZ

Part # AD8361ARMZ
Description MINSO DC-2.5GHZ TRUE PWR DETECTOR/CNTRLR
Category IC
Availability In Stock
Qty 15
Qty Price
1 - 3 $5.79943
4 - 6 $4.61319
7 - 9 $4.34957
10 - 12 $4.04203
13 + $3.60268
Manufacturer Available Qty
Analog Devices
Date Code: 1122
  • Shipping Freelance Stock: 15
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

AD8361
Rev. C | Page 10 of 24
CARRIER FREQUENCY (MHz)
7.8
7.6
6.2
100 1000
7.2
6.6
6.4
7.4
6.8
7.0
CONVERSION GAIN (V/V rms)
6.0
5.8
5.6
V
S
= 3V
01088-C-030
Figure 30. Conversion Gain Change vs. Frequency, Supply 3 V, Ground
Reference Mode, Frequency 100 MHz to 2500 MHz, Representative Device
67mV
370mV
270mV
25mV
500mV PER
VERTICAL
DIVISION
SUPPLY
20µs PER HORIZONTAL DIVISION
RF
INPUT
01088-C-031
Figure 31. Output Response to Gating on Power Supply, for Various RF Input
Levels, Supply 3 V, Modulation Frequency 900 MHz, 0.01 µF Filter Capacitor
R1
75
732
50
0.1µF
C4
0.01µF
C2
100pF
HP8648B
SIGNAL
GENERATOR
C1 C3
TEK TDS784C
SCOPE
C5
100pF
TEK P6204
FET PROBE
1
2
3
4
8
7
6
5
AD8361
VPOS
IREF
RFIN
PWDN
SREF
VRMS
FLTR
COMM
01088-C-032
HP8110A
PULSE
GENERATOR
AD811
Figure 32. Hardware Configuration for Output Response to Power Supply
Gating Measurements
CONVERSION GAIN (V/V rms)
7.66.9 7.0 7.2
16
PERCENT
7.4 7.8
14
12
10
8
6
4
2
0
01088-C-033
Figure 33. Conversion Gain Distribution Frequency 100 MHz,
Supply 5 V, Sample Size 3000
IREF MODE INTERCEPT (V)
0.400.32 0.34 0.36
PERCENT
0.38 0.44
12
10
8
6
4
2
0
0.42
01088-C-034
Figure 34. Output Reference, Internal Reference Mode, Supply 5 V,
Sample Size 3000 (MSOP Only)
SREF MODE INTERCEPT (V)
0.720.64 0.66 0.68
PERCENT
0.70 0.76
12
10
8
6
4
2
0
0.74
01088-C-035
Figure 35. Output Reference, Supply Reference Mode, Supply 5 V,
Sample Size 3000 (MSOP Only)
AD8361
Rev. C | Page 11 of 24
CIRCUIT DESCRIPTION
The AD8361 is an rms-responding (mean power) detector that
provides an approach to the exact measurement of RF power
that is basically independent of waveform. It achieves this
function through the use of a proprietary technique in which
the outputs of two identical squaring cells are balanced by the
action of a high-gain error amplifier.
The signal to be measured is applied to the input of the first
squaring cell, which presents a nominal (LF) resistance of
225 Ω between the RFIN and COMM pins (connected to the
ground plane). Because the input pin is at a bias voltage of about
0.8 V above ground, a coupling capacitor is required. By making
this an external component, the measurement range may be
extended to arbitrarily low frequencies.
The AD8361 responds to the voltage, V
IN
, at its input by
squaring this voltage to generate a current proportional to V
IN
squared. This is applied to an internal load resistor, across which
a capacitor is connected. These form a low-pass filter, which
extracts the mean of V
IN
squared. Although essentially voltage-
responding, the associated input impedance calibrates this port
in terms of equivalent power. Therefore, 1 mW corresponds to a
voltage input of 447 mV rms. The Applications section shows
how to match this input to 50 Ω.
The voltage across the low-pass filter, whose frequency may be
arbitrarily low, is applied to one input of an error-sensing
amplifier. A second identical voltage-squaring cell is used to
close a negative feedback loop around this error amplifier. This
second cell is driven by a fraction of the quasi-dc output voltage
of the AD8361. When the voltage at the input of the second
squaring cell is equal to the rms value of V
IN
, the loop is in a
stable state, and the output then represents the rms value of the
input. The feedback ratio is nominally 0.133, making the rms-dc
conversion gain ×7.5, that is
rmsVV
IN
OUT
×= 5.7
By completing the feedback path through a second squaring
cell, identical to the one receiving the signal to be measured,
several benefits arise. First, scaling effects in these cells cancel;
thus, the overall calibration may be accurate, even though the
open-loop response of the squaring cells taken separately need
not be. Note that in implementing rms-dc conversion, no
reference voltage enters into the closed-loop scaling. Second, the
tracking in the responses of the dual cells remains very close
over temperature, leading to excellent stability of calibration.
The squaring cells have very wide bandwidth with an intrinsic
response from dc to microwave. However, the dynamic range of
such a system is fairly small, due in part to the much larger
dynamic range at the output of the squaring cells. There are
practical limitations to the accuracy of sensing very small error
signals at the bottom end of the dynamic range, arising from small
random offsets that limit the attainable accuracy at small inputs.
On the other hand, the squaring cells in the AD8361 have a
Class-AB aspect; the peak input is not limited by their quiescent
bias condition but is determined mainly by the eventual loss of
square-law conformance. Consequently, the top end of their
response range occurs at a fairly large input level (approximately
700 mV rms) while preserving a reasonably accurate square-law
response. The maximum usable range is, in practice, limited by
the output swing. The rail-to-rail output stage can swing from a
few millivolts above ground to less than 100 mV below the
supply. An example of the output induced limit: given a gain of
7.5 and assuming a maximum output of 2.9 V with a 3 V supply,
the maximum input is (2.9 V rms)/7.5 or 390 mV rms.
Filtering
An important aspect of rms-dc conversion is the need for
averaging (the function is
root-MEAN-square). For complex RF
waveforms, such as those that occur in CDMA, the filtering
provided by the on-chip, low-pass filter, although satisfactory
for CW signals above 100 MHz, is inadequate when the signal
has modulation components that extend down into the
kilohertz region. For this reason, the FLTR pin is provided: a
capacitor attached between this pin and VPOS can extend the
averaging time to very low frequencies.
Offset
An offset voltage can be added to the output (when using the
MSOP version) to allow the use of ADCs whose range does not
extend down to ground. However, accuracy at the low end
degrades because of the inherent error in this added voltage.
This requires that the IREF (
internal reference) pin be tied to
VPOS and SREF (
supply reference) to ground.
In the IREF mode, the intercept is generated by an internal
reference cell and is a fixed 350 mV, independent of the supply
voltage. To enable this intercept, IREF should be open-circuited,
and SREF should be grounded.
In the SREF mode, the voltage is provided by the supply. To
implement this mode, tie IREF to VPOS and SREF to VPOS.
The offset is then proportional to the supply voltage and is
400 mV for a 3 V supply and 667 mV for a 5 V supply.
AD8361
Rev. C | Page 12 of 24
APPLICATIONS
Basic Connections
Figure 36 through Figure 38 show the basic connections for the
AD8361’s MSOP version in its three operating modes. In all
modes, the device is powered by a single supply of between
2.7 V and 5.5 V. The VPOS pin is decoupled using 100 pF and
0.01 µF capacitors. The quiescent current of 1.1 mA in
operating mode can be reduced to 1 µA by pulling the PWDN
pin up to VPOS.
A 75 Ω external shunt resistance combines with the ac-coupled
input to give an overall broadband input impedance near 50 Ω.
Note that the coupling capacitor must be placed between the
input and the shunt impedance. Input impedance and input
coupling are discussed in more detail below.
The input coupling capacitor combines with the internal input
resistance (Figure 37) to provide a high-pass corner frequency
given by the equation
IN
C
RC
f
××
=
π2
1
dB3
With the 100 pF capacitor shown in Figure 36 through Figure 38,
the high-pass corner frequency is about 8 MHz.
1
2
3
4
8
7
6
5
AD8361
VPOS
IREF
RFIN
PWDN
SREF
VRMS
FLTR
COMM
R1
75
0.01µF
C
C
100pF
CFLTR
100pF
+V
S
2.7V – 5.5V
RFIN
V rms
01088-C-036
Figure 36. Basic Connections for Ground Reference Mode
1
2
3
4
8
7
6
5
AD8361
VPOS
IREF
RFIN
PWDN
SREF
VRMS
FLTR
COMM
R1
75
0.01µF
C
C
100pF
CFLTR
100pF
+V
S
2.7V – 5.5V
RFIN
V rms
01088-C-037
Figure 37. Basic Connections for Internal Reference Mode
1
2
3
4
8
7
6
5
AD8361
VPOS
IREF
RFIN
PWDN
SREF
VRMS
FLTR
COMM
R1
75
0.01µF
C
C
100pF
CFLTR
100pF
+V
S
2.7V – 5.5V
RFIN
V rms
01088-C-038
Figure 38. Basic Connections for Supply Referenced Mode
The output voltage is nominally 7.5 times the input rms voltage
(a conversion gain of 7.5 V/V rms). Three modes of operation
are set by the SREF and IREF pins. In addition to the ground
reference mode shown in Figure 36, where the output voltage
swings from around near ground to 4.9 V on a 5.0 V supply, two
additional modes allow an offset voltage to be added to the
output. In the internal reference mode (Figure 37), the output
voltage swing is shifted upward by an internal reference voltage
of 350 mV. In supply referenced mode (Figure 38), an offset
voltage of V
S
/7.5 is added to the output voltage. Table 4
summarizes the connections, output transfer function, and
minimum output voltage (i.e., zero signal) for each mode.
Output Swing
Figure 39 shows the output swing of the AD8361 for a 5 V
supply voltage for each of the three modes. It is clear from
Figure 39 that operating the device in either internal reference
mode or supply referenced mode reduces the effective dynamic
range as the output headroom decreases. The response for lower
supply voltages is similar (in the supply referenced mode, the
offset is smaller), but the dynamic range reduces further as
headroom decreases. Figure 40 shows the response of the
AD8361 to a CW input for various supply voltages.
INPUT (V rms)
5.0
4.5
0.0
0
0.50.1 0.2 0.3 0.4
3.0
1.5
1.0
0.5
4.0
3.5
2.0
2.5
OUTPUT (V)
SUPPLY REF
INTERNAL REF
GROUND REF
0.6 0.7 0.8
01088-C-039
Figure 39. Output Swing for Ground, Internal, and
Supply Referenced Mode, VPOS = 5 V (MSOP Only)
PREVIOUS12345678NEXT