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74LVQ244SC

Part # 74LVQ244SC
Description IC BUFF/DVR TRI-ST DUAL 20SOIC
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

74LVQ244
Low Voltage Octal Buffer/Line Driver with 3-STATE
Outputs
General Description
The LVQ244 is an octal buffer and line driver designed to be
employed as a memory address driver, clock driver and bus
oriented transmitter or receiver which provides improved PC
board density.
Features
n Ideal for low power/low noise 3.3V applications
n Implements patented EMI reduction circuitry
n Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch-up immunity
n Guaranteed incident wave switching into 75
n 4 kV minimum ESD immunity
Ordering Code:
Order Number Package Number Package Description
74LVQ244SC M20B 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC
74LVQ244SJ M20D 20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ
74LVQ244QSC MQA20 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
IEEE/IEC
DS011356-1
Pin Assignment for SOIC and QSOP
DS011356-2
May 1998
74LVQ244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
© 1998 Fairchild Semiconductor Corporation DS011356 www.fairchildsemi.com
Truth Tables
Inputs Outputs
OE
1
I
n
(Pins 12, 14, 16, 18)
LL L
LH H
HX Z
Inputs Outputs
OE
2
I
n
(Pins 3, 5, 7, 9)
LL L
LH H
HX Z
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Pin Descriptions
Pin Names Description
OE
1
,OE
2
3-STATE Output Enable Inputs
I
0
–I
7
Inputs
O
0
–O
7
Outputs
www.fairchildsemi.com 2
Absolute Maximum Ratings (Note 1)
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
±
400 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
DC Latch-Up Source or
Sink Current
±
300 mA
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
) 2.0V to 3.6V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (V
O
) 0VtoV
CC
Operating Temperature (T
A
) −40˚C to +85˚C
Minimum Input Edge Rate V/t
V
IN
from 0.8V to 2.0V
V
CC
@
3.0V 125 mV/ns
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be op-
erated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for ac-
tual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol Parameter
V
CC
(V)
T
A
=
+25˚C T
A
=
−40˚C to +85˚C Units Conditions
Typ Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
3.0 1.5 2.0 2.0 V V
OUT
=
0.1V
or V
CC
0.1V
V
IL
Maximum Low Level
Input Voltage
3.0 1.5 0.8 0.8 V V
OUT
=
0.1V
or V
CC
0.1V
V
OH
Minimum High Level
Output Voltage
3.0 2.99 2.9 2.9 V I
OUT
=
−50 µA
3.0 2.58 2.48 V V
IN
=
V
IL
or V
IH
(Note 3)
I
OH
=
−12 mA
V
OL
Maximum Low Level
Output Voltage
3.0 0.002 0.1 0.1 V I
OUT
=
50 µA
3.0 0.36 0.44 V V
IN
=
V
IL
or V
IH
(Note 3)
I
OL
=
12 mA
I
IN
Maximum Input
Leakage Current
3.6
±
0.1
±
1.0 µA V
I
=
V
CC
, GND
I
OLD
Minimum Dynamic (Note 4)
Output Current
3.6 36 mA V
OLD
=
0.8V Max (Note 5)
I
OHD
3.6 −25 mA V
OHD
=
2.0V Min (Note 5)
I
CC
Maximum Quiescent
Supply Current
3.6 4.0 40.0 µA V
IN
=
V
CC
or GND
I
OZ
Maximum 3-STATE
Leakage Current
V
I
(OE)
=
V
IL
,V
IH
3.6
±
0.25
±
2.5 µA V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
V
OLP
Quiet Output
Maximum Dynamic V
OL
3.3 0.4 0.8 V (Notes 6, 7)
V
OLV
Quiet Output
Minimum Dynamic V
OL
3.3 −0.4 −0.8 V (Notes 6, 7)
V
IHD
Minimum High Level
Dynamic Input Voltage
3.3 1.7 2.0 V (Notes 6, 8)
V
ILD
Maximum Low Level
Dynamic Input Voltage
3.3 1.7 0.8 V (Notes 6, 8)
Note 3: All outputs loaded thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed for 74LVQ.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold (V
IHD
),
f
=
1 MHz.
3 www.fairchildsemi.com
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