Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

74ALVC164245ZQLR

Part # 74ALVC164245ZQLR
Description 16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL - Tape and Reel
Category IC
Availability In Stock
Qty 42
Qty Price
1 - 8 $1.95162
9 - 17 $1.55243
18 - 26 $1.46372
27 - 35 $1.36022
36 + $1.21237
Manufacturer Available Qty
Texas Instruments
Date Code: 0744
  • Shipping Freelance Stock: 42
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

www.ti.com
FEATURES
NOTE: New and improved versions of the SN74ALVC164245
are available. The new part numbers are SN74LVC16T245 and
SN74LVCH16T245 and should be considered for new designs.
DESCRIPTION/ORDERING INFORMATION
DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
(3.3 V, 5 V) V
CCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
(3.3 V, 5 V) V
CCB
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CCA
(2.5 V, 3.3 V)
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CCA
(2.5 V, 3.3 V)
2A5
2A6
GND
2A7
2A8
2OE
SN74ALVC164245
16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416P MARCH 1994 REVISED NOVEMBER 2005
Member of the Texas Instruments Widebus™
Family
Max t
pd
of 5.8 ns at 3.3 V
± 24-mA Output Drive at 3.3 V
Control Inputs V
IH
/V
IL
Levels Are Referenced
to V
CCA
Voltage
Latch-Up Performance Exceeds 250 mA Per
JESD 17
This 16-bit (dual-octal) noninverting bus transceiver
contains two separate supply rails. B port has V
CCB
,
which is set to operate at 3.3 V and 5 V. A port has
V
CCA
, which is set to operate at 2.5 V and 3.3 V. This
allows for translation from a 2.5-V to a 3.3-V
environment, and vice versa, or from a 3.3-V to a 5-V
environment, and vice versa.
The SN74ALVC164245 is designed for asynchronous
communication between data buses. The control
circuitry (1DIR, 2DIR, 1 OE, and 2 OE) is powered by
V
CCA
.
To ensure the high-impedance state during power up
or power down, the output-enable ( OE) input should
be tied to V
CC
through a pullup resistor; the minimum
value of the resistor is determined by the
current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
FBGA GRD 74ALVC164245GRDR
Tape and reel VC4245
FBGA ZRD (Pb-free) 74ALVC164245ZRDR
Tube of 25 SN74ALVC164245DL
SSOP DL SN74ALVC164245DLR ALVC164245
Reel of 1000
74ALVC164245DLRG4
–40 ° C to 85 ° C SN74ALVC164245DGGR
Reel of 2000
74ALVC164245DGGRG4
TSSOP DGG ALVC164245
SN74ALVC164245DGGT
Reel of 250
74ALVC164245DGGTE4
VFBGA GQL SN74ALVC164245KR
Reel of 1000 VC4245
VFBGA ZQL (Pb-free) 74ALVC164245ZQLR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1994–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
K
abc
GRD OR ZRD PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
SN74ALVC164245
16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416P MARCH 1994 REVISED NOVEMBER 2005
The logic levels of the direction-control (DIR) input and the output-enable ( OE) input activate either the B-port
outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data
from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the
A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic
HIGH or LOW level applied to prevent excess I
CC
and I
CCZ
.
TERMINAL ASSIGNMENTS
(1)
(56-Ball GQL/ZQL Package)
1 2 3 4 5 6
A 1DIR NC NC NC NC 1 OE
B 1B2 1B1 GND GND 1A1 1A2
C 1B4 1B3 V
CCB
V
CCA
1A3 1A4
D 1B6 1B5 GND GND 1A5 1A6
E 1B8 1B7 1A7 1A8
F 2B1 2B2 2A2 2A1
G 2B3 2B4 GND GND 2A4 2A3
H 2B5 2B6 V
CCB
V
CCA
2A6 2A5
J 2B7 2B8 GND GND 2A8 2A7
K 2DIR NC NC NC NC 2 OE
abc (1) NC No internal connection
TERMINAL ASSIGNMENTS
(1)
(54-Ball GRD/ZRD Package)
1 2 3 4 5 6
A 1B1 NC 1DIR 1 OE NC 1A1
B 1B3 1B2 NC NC 1A2 1A3
C 1B5 1B4 V
CCB
V
CCA
1A4 1A5
D 1B7 1B6 GND GND 1A6 1A7
E 2B1 1B8 GND GND 1A8 2A1
F 2B3 2B2 GND GND 2A2 2A3
G 2B5 2B4 V
CCB
V
CCA
2A4 2A5
H 2B7 2B6 NC NC 2A6 2A7
J 2B8 NC 2DIR 2 OE NC 2A8
(1) NC No internal connection
xxxxx
xxxxx
xxxxx
xxxxx
FUNCTION TABLE
(1)
(EACH 8-BIT SECTION)
CONTROL INPUTS OUTPUT CIRCUITS
OPERATION
OE DIR A PORT B PORT
L L Enabled Hi-Z B data to A bus
L H Hi-Z Enabled A data to B bus
H X Hi-Z Hi-Z Isolation
(1) Input circuits of the data I/Os always are active.
2
www.ti.com
To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
Absolute Maximum Ratings
(1)
SN74ALVC164245
16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416P MARCH 1994 REVISED NOVEMBER 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range for V
CCB
at 5 V and V
CCA
at 3.3 V (unless otherwise noted)
MIN MAX UNIT
V
CCA
–0.5 4.6
V
CC
Supply voltage range V
V
CCB
–0.5 6
Except I/O ports
(2)
–0.5 6
V
I
Input voltage range I/O port A
(3)
–0.5 V
CCA
+ 0.5 V
I/O port B
(2)
–0.5 V
CCB
+ 0.5
I
IK
Input clamp current V
I
< 0 –50 mA
I
OK
Output clamp current V
O
< 0 –50 mA
I
O
Continuous output current ± 50 mA
Continuous current through each V
CC
or GND ± 100 mA
DGG package 70
DL package 63
θ
JA
Package thermal impedance
(4)
° C/W
GQL/ZQL package 42
GRD/ZRD package 36
T
stg
Storage temperature range –65 150 ° C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) This value is limited to 6 V maximum.
(3) This value is limited to 4.6 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
3
1234567NEXT