Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

SNJ54LVTH245AW

Part # SNJ54LVTH245AW
Description Bus XCVR Single 8-CH 3-ST 20-Pin CFPAK Tube - Rail/Tube
Category IC
Availability Out of Stock
Qty 0
Qty Price
1 + $40.31980



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

 
    
  
SCBS130T − MAY 1992 − REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
D Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
D Support Unregulated Battery Operation
Down to 2.7 V
D I
off
and Power-Up 3-State Support Hot
Insertion
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
SN54LVTH245A ...J OR W PACKAGE
SN74LVTH245A . . . DB, DW, NS,
OR PW PACKAGE
(TOP VIEW)
3212019
9
10 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A2
A1
DIR
B7
B6 OE
A8
GND
B8
V
CC
SN54LVTH245A . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN74LVTH245A . . . RGY PACKAGE
(TOP VIEW)
120
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
OE
B1
B2
B3
B4
B5
B6
B7
A1
A2
A3
A4
A5
A6
A7
A8
B8
V
GND
CC
DIR
description/ordering information
These octal bus transceivers are designed specifically for low-voltage (3.3-V) V
CC
operation, but with the
capability to provide a TTL interface to a 5-V system environment.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE MARKING
QFN − RGY Tape and reel SN74LVTH245ARGYR LXH245A
SOIC − DW
Tube SN74LVTH245ADW
LVTH245A
SOIC − DW
Tape and reel SN74LVTH245ADWR
LVTH245A
SOP − NS Tape and reel SN74LVTH245ANSR LVTH245A
−40°C to 85°C
SSOP − DB Tape and reel SN74LVTH245ADBR LXH245A
−40 C to 85 C
TSSOP − PW
Tube SN74LVTH245APW
LXH245A
TSSOP − PW
Tape and reel SN74LVTH245APWR
LXH245A
VFBGA − GQN
Tape and reel
SN74LVTH245AGQNR
LXH245A
VFBGA − ZQN (Pb-free)
Tape and reel
SN74LVTH245AZQNR
LXH245A
CDIP − J Tube SNJ54LVTH245AJ SNJ54LVTH245AJ
−55°C to 125°C
CFP − W Tube SNJ54LVTH245AW SNJ54LVTH245AW
−55 C to 125 C
LCCC − FK Tube SNJ54LVTH245AFK SNJ54LVTH245AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
  !" # $%&" !#  '%()$!" *!"&
*%$"# $ " #'&$$!"# '& "+& "&#  &,!# #"%&"#
#"!*!* -!!". *%$" '$&##/ *&# " &$&##!). $)%*&
"&#"/  !)) '!!&"&#
 '*%$"# $')!" " 012 !)) '!!&"&# !& "&#"&*
%)&## "+&-#& "&*  !)) "+& '*%$"# '*%$"
'$&##/ *&# " &$&##!). $)%*& "&#"/  !)) '!!&"&#
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
 
    
  
SCBS130T − MAY 1992 − REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
These devices are designed for asynchronous communication between data buses. They transmit data from
the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE
) input can be used to disable the devices so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE
should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
terminal assignments
1234
A A1
DIR V
CC
OE
B A3 B2 A2 B1
C A5 A4 B4 B3
D A7 B6 A6 B5
E GND A8 B8 B7
FUNCTION TABLE
INPUTS
OPERATION
OE DIR
OPERATION
L L B data to A bus
L H A data to B bus
H X Isolation
logic diagram (positive logic)
DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
Pin numbers shown are for the DB, DW, FK, J, NS, PW, RGY, and W packages.
SN74LVTH245A . . . GQN OR ZQN PACKAGE
(TOP VIEW)
1234
A
B
C
D
E
 
    
  
SCBS130T − MAY 1992 − REVISED SEPTEMBER 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
−0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance
or power-off state, V
O
(see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, V
O
(see Note 1) −0.5 V to V
CC
+ 0.5 V. . . . . . . . . . . . .
Current into any output in the low state, I
O
: SN54LVTH245A 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74LVTH245A 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the high state, I
O
(see Note 2): SN54LVTH245A 48 mA. . . . . . . . . . . . . . . . . . . . . .
SN74LVTH245A 64 mA. . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 3): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): GQN/ZQN package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 4): RGY package 37°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and V
O
> V
CC
.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 5)
SN54LVTH245A SN74LVTH245A
UNIT
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 2.7 3.6 2.7 3.6 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
V
I
Input voltage 5.5 5.5 V
I
OH
High-level output current −24 −32 mA
I
OL
Low-level output current 48 64 mA
t/v Input transition rise or fall rate Outputs enabled 10 10 ns/V
t/V
CC
Power-up ramp rate 200 200 µs/V
T
A
Operating free-air temperature −55 125 −40 85 °C
NOTE 5: All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
1234567NEXT