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SNJ54ALS652FK

Part # SNJ54ALS652FK
Description Bus XCVR Single 8-CH 3-ST 28-Pin CLLCC Tube
Category IC
Availability Out of Stock
Qty 0
Qty Price
1 + $8.28000



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Bus Transceivers/Registers
Independent Registers and Enables for A
and B Buses
Multiplexed Real-Time and Stored Data
Choice of True or Inverting Data Paths
Choice of 3-State or Open-Collector
Outputs to A Bus
DEVICE A OUTPUT B OUTPUT LOGIC
SN74ALS651A,
’AS651
3-State 3-State Inverting
SN54ALS652,
SN74ALS652A,
’AS652
3-State 3-State True
’ALS653 Open Collector 3-State Inverting
SN74ALS654 Open Collector 3-State True
description
These devices consist of bus-transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Output-enable (OEAB and OEBA
) inputs are
provided to control the transceiver functions.
Select-control (SAB and SBA) inputs are provided
to select real-time or stored data transfer. The
circuitry used for select control eliminates the
typical decoding glitch that occurs in a multiplexer
during the transition between stored and real-time
data. A low input level selects real-time data, and
a high input level selects stored data. Figure 1
illustrates the four fundamental bus-management
functions that can be performed with the octal bus
transceivers and registers
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at
the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When
SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OEBA
. In this configuration, each output reinforces its input.
When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains
at its last state.
The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the
recommended maximum I
OL
for the -1 versions is increased to 48 mA. There are no -1 versions of the
SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NC – No internal connection
SN54ALS, SN54AS. . . FK PACKAGE
(TOP VIEW)
SN54ALS, SN54AS. . . JT PACKAGE
SN74ALS, SN74AS. . . DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLKAB
SAB
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
CLKBA
SBA
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
321
13 14
5
6
7
8
9
10
11
OEBA
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
4
15 16 17
18
A8
GND
NC
B8
B7
B6
OEAB
SAB
CLKAB
NC
28 27 26
25
24
23
22
21
20
19
12
A7
CLKBA
SAB
CC
V
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SN74ALS651ANT SN74ALS651ANT
SN74ALS652ANT SN74ALS652ANT
PDIP NT
Tube
SN74ALS653NT SN74ALS653NT
PDIP
NT
Tube
SN74ALS654NT SN74ALS654NT
SN74AS651NT SN74AS651NT
SN74AS652NT SN74AS652NT
Tube SN74ALS651ADW
ALS651A
Tape and reel SN74ALS651ADWR
ALS651A
0°Cto70°C
Tube SN74ALS652ADW
ALS652A
0°C
to
70°C
Tape and reel SN74ALS652ADWR
ALS652A
Tube SN74ALS653DW
ALS653
SOIC DW
Tape and reel SN74ALS653DWR
ALS653
SOIC
DW
Tube SN74ALS654DW
ALS654
Tape and reel SN74ALS654DWR
ALS654
Tube SN74AS651DW
AS651
Tape and reel SN74AS651DWR
AS651
Tube SN74AS652DW
AS652
Tape and reel SN74AS652DWR
AS652
SNJ54ALS652JT SNJ54ALS652JT
CDIP JT
Tube
SNJ54ALS653JT SNJ54ALS653JT
CDIP
JT
Tube
SNJ54AS651JT SNJ54AS651JT
55°Cto125°C
SNJ54AS652JT SNJ54AS652JT
55°C
to
125°C
SNJ54ALS652FK SNJ54ALS652FK
LCCC FK
Tube
SNJ54ALS653FK SNJ54ALS653FK
LCCC
FK
Tube
SNJ54AS651FK SNJ54AS651FK
SNJ54AS652FK SNJ54AS652FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
OEAB
X
L
L
OEAB
LL
CLKAB
X
CLKBA
X
SAB
X
SBA
L
CLKAB
X
CLKBA
X
SAB
L
SBA
X
H
CLKAB CLKBA
X
SAB
X
SBA
X
CLKAB CLKBA SAB SBA
X
H
XX
X
X
X
H L H or L H H
OEBA
OEBA
HH
OEAB OEBA
OEAB OEBA
H or L
REAL-TIME TRANSFER
BUS B TO BUS A
REAL-TIME TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A AND/OR B
3 21 1 23 2 22 1 23 2 22321
3 21 23 2 22 3 21 1 2 22
1
23
Pin numbers shown are for the DW, JT, and NT packages.
Figure 1. Bus-Management Functions
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