Name: SNJ54ABT240FK
SKU: SNJ54ABT240FK
Price: 14.36521 USD
Availability: InStock

SN54ABT240, SN74ABT240A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS098I – JANUARY 1991 – REVISED JUNE 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Typical V

OLP

(Output Ground Bounce)

<1 V at V

= 5 V, T

= 25°C

High-Drive Outputs (–32-mA I

, 64-mA I

)

off

Supports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

description

These octal buffers and line drivers are designed

specifically to improve both the performance and

density of 3-state memory address drivers, clock

drivers, and bus-oriented receivers and

transmitters. Together with the SN54ABT241,

SN74ABT241A, SN54ABT244, and

SN74ABT244A, these devices provide the choice

of selected combinations of inverting and

noninverting outputs, symmetrical active-low

output-enable (OE

) inputs, and complementary

OE and OE

inputs.

The SN54ABT240 and SN74ABT240A are

organized as two 4-bit buffers/line drivers with

separate OE

inputs. When OE is low, the devices

pass inverted data from the A inputs to the Y

outputs. When OE

is high, the outputs are in the

high-impedance state.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74ABT240AN SN74ABT240AN

SOIC DW

Tube SN74ABT240ADW

ABT240A

Cto85

SOIC

–

Tape and reel SN74ABT240ADWR

ABT240A

–

40°C

85°C

SOP – NS Tape and reel SN74ABT240ANSR ABT240A

SSOP – DB Tape and reel SN74ABT240ADBR AB240A

TSSOP – PW Tape and reel SN74ABT240APWR AB240A

CDIP – J Tube SNJ54ABT240J SNJ54ABT240J

–55°C to 125°C

CFP – W Tube SNJ54ABT240W SNJ54ABT240W

LCCC – FK Tube SNJ54ABT240FK SNJ54ABT240FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN54ABT240 ...J OR W PACKAGE

SN74ABT240A . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54ABT240 . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2 2OE

2Y1

GND

2A1

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

SN54ABT240, SN74ABT240A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS098I – JANUARY 1991 – REVISED JUNE 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE

should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

FUNCTION TABLE

(each buffer)

INPUTS

OUTPUT

OE A

L H L

L LH

H X Z

logic diagram (positive logic)

218

1Y1

1OE

1A1

416

1Y2

1A2

614

1Y3

1A3

812

1Y4

1A4

11 9

2Y1

2OE

2A1

13 7

2Y2

2A2

15 5

2Y3

2A3

17 3

2Y4

2A4

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, V

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high-impedance or power-off state, V

–0.5 V to 5.5 V. . . . . . . . .

Current into any output in the low state, I

: SN54ABT240 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74ABT240A 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54ABT240, SN74ABT240A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS098I – JANUARY 1991 – REVISED JUNE 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54ABT240 SN74ABT240A

UNIT

MIN MAX MIN MAX

UNIT

Supply voltage 4.5 5.5 4.5 5.5 V

High-level input voltage 2 2 V

Low-level input voltage 0.8 0.8 V

Input voltage 0 V

0 V

High-level output current –24 –32 mA

Low-level output current 48 64 mA

∆t/∆v Input transition rise or fall rate Outputs enabled 5 5 ns/V

Operating free-air temperature –55 125 –40 85 °C

NOTE 3: All unused inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

= 25°C SN54ABT240 SN74ABT240A

UNIT

PARAMETER

TEST

CONDITIONS

MIN TYP

†

MAX MIN MAX MIN MAX

UNIT

= 4.5 V, I

= –18 mA –1.2 –1.2 –1.2 V

= 4.5 V, I

= –3 mA 2.5 2.5 2.5

= 5 V, I

= –3 mA 3 3 3

=45V

= –24 mA 2 2

= –32 mA 2* 2

=45V

= 48 mA 0.55 0.55

= 64 mA 0.55* 0.55

hys

100 mV

= 5.5 V, V

= V

or GND ±1 ±1 ±1 µA

OZH

= 5.5 V, V

= 2.7 V 10 10 10 µA

OZL

= 5.5 V, V

= 0.5 V –10 –10 –10 µA

off

= 0, V

or V

≤ 4.5 V ±100 ±100 µA

CEX

= 5.5 V, V

= 5.5 V Outputs high 50 50 50 µA

‡

= 5.5 V, V

= 2.5 V –50 –100 –180 –50 –180 –50 –180 mA

V55VI0

Outputs high 1 250 250 250 µA

= 5.5 V, I

= 0,

or GND

Outputs low 24 30 30 30 mA

GND

Outputs disabled 0.5 250 250 250 µA

Data

= 5.5 V,

One input at 3.4 V,

Outputs enabled 1.5 1.5 1.5

∆I

inputs

Other inputs at

or GND

Outputs disabled 0.05 0.05 0.05

Control

inputs

= 5.5 V, One input at 3.4 V,

Other inputs at V

or GND

1.5 1.5 1.5

= 2.5 V or 0.5 V 4 pF

= 2.5 V or 0.5 V 7.5 pF

* On products compliant to MIL-PRF-38535, this parameter does not apply.

†

All typical values are at V

= 5 V.

‡

Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

This is the increase in supply current for each input that is at the specified TTL voltage level rather than V

or GND.

Part #	SNJ54ABT240FK
Description	Buffer/Line Driver 8-CH Inverting 3-ST BiCMOS 20-Pin CLLCC
Category	IC
Availability	In Stock
Qty	2

SNJ54ABT240FK

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