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HMMC-5618

Part # HMMC-5618
Description RF AMP MOD SGL PWR AMP 20GHZ5.5V - Gel-pak, waffle pack,
Category Microcircuit
Availability Out of Stock
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1 + $69.38950



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

6-64
6 20 GHz Amplifier
Technical Data
Features
High Efficiency:
11% @ P
-1dB
Typical
Output Power, P
-1dB
:
18 dBm Typical
High Gain: 14 dB Typical
Flat Gain Response:
± 0.5 dB Typical
Low Input/Output VSWR:
<1.7:1 Typical
Single Supply Bias:
5 volts (@ 115 mA Typical)
with Optional Gate Bias
Description
The HMMC-5618 6–20 GHz MMIC
is an efficient two-stage amplifier
that is designed to be used as a
cascadable intermediate gain
block for EW applications. In
communication systems, it can be
used as an amplifier for a local
oscillator, or as a transmit
amplifier. It is fabricated using a
PHEMT integrated circuit struc-
ture that provides exceptional
efficiency and flat gain perfor-
mance. During typical operation,
with a single 5-volt DC power
supply, each gain stage is biased
for Class-A operation for optimal
power output with minimal
distortion. The RF input and RF
output has matching circuitry for
use in 50␣ ohm environments.
Absolute Maximum Ratings
[1]
Symbol Parameters/Conditions Units Min. Max.
V
D1
, V
D2
Drain Supply Voltage V 5.5
V
G1
Optional Gate Supply Voltage V -5 +1
V
G2
Optional Gate Supply Voltage V -10 +1
I
D1
Drain Supply Current mA 70
I
D2
Drain Supply Current mA 84
P
in
RF Input Power
[2]
dBm 20
T
ch
Channel Temp.
[3]
°C +160
T
A
Backside Ambient Temp. °C -55 +100
T
STG
Storage Temperature °C -65 +150
T
max
Maximum Assembly Temp. °C +300
Notes:
1. Absolute maximum ratings for continuous operation unless otherwise noted.
2. Operating at this power level for extended (continuous) periods is not
recommended.
3. Refer to DC Specifications/Physical Properties table for derating information.
HMMC-5618
Chip Size: 920 x 920 µm (36.2 x 36.2 mils)
Chip Size Tolerance: ± 10 µm (± 0.4 mils)
Chip Thickness: 127 ± 15 µm (5.0 ± 0.6 mils)
Pad Dimensions: 80 x 80 µm (3.2 x 3.2 mils)
The backside of the chip is both
RF and DC ground. This helps
simplify the assembly process
and reduces assembly related
performance variations and costs.
The MMIC is a cost effective
alternative to hybrid (discrete-
FET) amplifiers that require
complex tuning and assembly
processes.
6-64
5965-5443E
6-65
HMMC-5618 DC Specifications/Physical Properties
[1]
Symbol Parameters and Test Conditions Units Min. Typ. Max.
V
D1
, V
D2
Drain Supply Voltage V 3.0 5.0 5.5
I
D1
Stage-One Drain Supply Current mA 50
(V
D1
= 5 V , V
G1
= Open or Ground)
I
D2
Stage-Two Drain Supply Current mA 65
(V
D2
= 5 V , V
G2
= Open or Ground)
I
D1
+ I
D2
Total Drain Supply Current mA 115 140
(V
D1
= V
D2
= 5 V, V
G1
= V
G2
= Open or Ground)
V
P1
Optional Input-Stage Gate Supply Pinch-off Voltage V -4 -2.8
(V
D1
= 5 V , I
D1
< 3 mA: Input Stage OFF
[2]
)
I
G1
Gate Supply Current (Input Stage OFF
[2]
) m A 0.9
V
P2
Optional Input-Stage Gate Supply Pinch-off Voltage V -7.5 -5.3
(V
D2
= 5 V , I
D2
< 3.6 mA: Output Stage OFF
[2]
)
I
G2
Gate Supply Current (Output Stage OFF
[2]
) m A 1.7
(V
D2
= 5 V , V
G2
= Open or Ground)
θ
ch-bs
Thermal Resistance
[3]
°C/Watt 87
(Channel-to-Backside at T
ch
= 150°C)
T
ch
Channel Temperature
[4]
(T
A
= 100°C, MTTF = 10
6
hrs, °C 150
V
D1
= V
D2
= 5 V, V
G1
= V
G2
= Open)
Notes:
1. Backside ambient operating temperature T
A
= 25°C unless otherwise noted.
2. The specified FET stage is in the OFF state when biased with a gate voltage level that is sufficient to pinch off the drain
current.
3. Thermal resistance (in °C/Watt) at a channel temperature T (°C) can be estimated using his equation:
θ(T) 87 x [T(°C)+ 273] / [150°C + 273].
4. Derate MTTF by a factor of two for every 8°C above T
ch
.
HMMC-5618 RF Specifications, T
A
= 25°C, V
D1
= V
D2
= 5 V, V
G1
= V
G2
= Open or Ground, Z
O
= 50
618 GHz 5.920 GHz
Symbol Parameters and Test Conditions Units Typ. Min. Max. Min. Max.
Gain Small Signal Gain dB 14 12 11.5
Gain Gain Flatness dB ± 0.5
S
21
/T Temperature Coefficient of Gain dB/°C -0.025
(RL
in
)
MIN
Minimum Input Return Loss dB 12 10 9
(RL
out
)
MIN
Minimum Output Return Loss dB 12 10 10
Isolation Reverse Isolation dB 40
P
-1dB
Output Power @ 1 dB Gain Compression dBm 18 17 17
P
sat
Saturated Output Power (P
in
= 10 dBm) dBm 20 18.5 18.5
NF Noise Figure dB 5.5 7 7
6-66
HMMC-5618 Applications
The HMMC-5618 is a GaAs MMIC
amplifier designed for optimum
Class-A efficiency and flat gain
performance from 6 GHz to
20␣ GHz. It has applications as a
cascadable gain stage for EW
amplifiers, buffer stages, LO
drives, phased-array radar, and
transmitter amplifiers used in
commercial communication
systems. The MMIC solution is a
cost effective alternative to
hybrid assemblies.
Biasing and Operation
The MMIC amplifier is normally
biased with a single positive drain
supply connected to both V
D1
and
V
D2
bond pads as shown in
Figure␣ 8a. The recommended
drain supply voltage is 3 to
5␣ volts. If desired, the first stage
drain bonding pad can be biased
separately to provide a small
amount of gain slope control or
bandwidth extension as demon-
strated in Figure 2.
No ground wires are required
because all ground connections
are made with plated through-
holes to the backside of the
device.
Gate bias pads (V
G1
and V
G2
) are
also provided to allow adjust-
ments in gain, RF output power,
and DC power dissipation, if
necessary. No connection to the
gate pads is needed for single
drain-bias operation. However,
for custom applications, the DC
current flowing through the input
and/or output gain stage may be
adjusted by applying a voltage to
the gate bias pad(s) as shown in
Figure 8b. A negative gate-pad
voltage will decrease the drain
current. The gate-pad voltage is
approximately zero volts during
operation with no DC gate supply.
Refer to the Absolute Maximum
Ratings table for allowed DC and
thermal conditions.
Assembly Techniques
Solder die attach using a fluxless
gold-tin (AuSn) solder preform is
the recommended assembly
method. A conductive epoxy such
as ABLEBOND
®
71-1LM1 or
ABLEBOND
®
36-2 may also be
used for die attaching provided
the Maximum Thermal Ratings
are not exceeded. The device
should be attached to an electri-
cally conductive surface to
complete the DC and RF ground
paths. The backside metallization
on the device is gold.
It is recommended that the RF
input, RF output, and DC supply
connections be made using
0.7␣ mil diameter gold wire. The
device has been designed so that
optimum performance is realized
when the RF input and RF output
bond-wire inductance is approxi-
mately 0.2␣ nH as demonstrated in
Figures 4, 6, and 7. Therefore,
mesh or multiple-wire bonds are
not necessary. It is, however,
recommended that the RF wires
be as short as possible to mini-
mize assembly related perfor-
mance variations.
Thermosonic wedge is the
preferred method for wire
bonding to the gold bond pads.
Wires can be attached using a
guided-wedge at an ultrasonic
power level of roughly 64 dB for a
duration of 76 ± 8 msec with a
stage temperature of 150 ± 2 °C.
For more detailed information
see HP application note #999
“GaAs MMIC Assembly and
Handling Guidelines.”
GaAs MMICs are ESD sensitive.
Proper precautions should be used
when handling these devices.
Figure 1. HMMC-5618 Simplified Schematic.
IN
V
G1
V
G2
2K 2K 2K 1K
OUT
MATCHING
MATCHING
FEEDBACK
NETWORK
MATCHING
V
D1
V
D2
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