1
Data sheet acquired from Harris Semiconductor
SCHS123E
Features
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Independent of
R
X
, C
X
• Triggering from the Leading or Trailing Edge
• Q and
Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output Pulse Widths
• Schmitt Trigger Input on A and
B Inputs
• Retrigger Time is Independent of C
X
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Pinout
CD54HC4538, CD54HCT4538
(CERDIP)
CD74HC4538
(PDIP, SOIC, SOP, TSSOP)
CD74HCT4538
(PDIP, SOIC)
TOP VIEW
Description
The ’HC4538 and ’HCT4538 are dual
retriggerable/resettable monostable precision multivibrators
for fixed voltage timing applications. An external resistor
(R
X
) and an external capacitor (C
X
) control the timing and
the accuracy for the circuit. Adjustment of R
X
and C
X
provides a wide range of output pulse widths from the Q and
Q terminals. The propagation delay from trigger input-to-
output transition and the propagation delay from reset input-
to-output transition are independent of R
X
and C
X
.
Leading-edge triggering (A) and trailing edge triggering (
B)
inputs are provided for triggering from either edge of the
input pulse. An unused “A” input should be tied to GND and
an unused
B should be tied to V
CC
. On power up the IC is
reset. Unused resets and sections must be terminated. In
normal operation the circuit retriggers on the application of
each new trigger pulse. To operate in the non-triggerable
mode
Q is connected to B when leading edge triggering (A)
is used or Q is connected to A when trailing edge triggering
(
B) is used. The period (τ) can be calculated from τ = (0.7)
R
X
, C
X
; R
MIN
is 5kΩ. C
MIN
is 0pF.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
1C
X
1R
X
C
X
1R
1A
1B
1Q
GND
1Q
V
CC
2R
X
C
X
2R
2A
2B
2Q
2Q
2C
X
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC4538F3A -55 to 125 16 Ld CERDIP
CD54HCT4538F3A -55 to 125 16 Ld CERDIP
CD74HC4538E -55 to 125 16 Ld PDIP
CD74HC4538M -55 to 125 16 Ld SOIC
CD74HC4538MT -55 to 125 16 Ld SOIC
CD74HC4538M96 -55 to 125 16 Ld SOIC
CD74HC4538NSR -55 to 125 16 Ld SOP
CD74HC4538PW -55 to 125 16 Ld TSSOP
CD74HC4538PWR -55 to 125 16 Ld TSSOP
CD74HC4538PWT -55 to 125 16 Ld TSSOP
CD74HCT4538E -55 to 125 16 Ld PDIP
CD74HCT4538M -55 to 125 16 Ld SOIC
CD74HCT4538MT -55 to 125 16 Ld SOIC
CD74HCT4538M96 -55 to 125 16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC4538, CD74HC4538,
CD54HCT4538, CD74HCT4538
High-Speed CMOS Logic Dual Retriggerable
Precision Monostable Multivibrator
/Title
CD54
C453
,
D74
C453
,
D74
CT45
8)
Sub-
ect
High
peed
MOS
ogic
June 1998 - Revised October 2003
