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  

SCLS141E − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D High-Current 3-State True Outputs Can

Drive Up To 15 LSTTL Loads

D Eight D-Type Flip-Flops in a Single Package

D Full Parallel Access for Loading

D Low Power Consumption, 80-µA Max I

D Typical t

= 14 ns

D ±6-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

3212019

910111213

GND

CLK

SN54HC374 ...FK PACKAGE

(TOP VIEW)

SN54HC374 ...J OR W PACKAGE

SN74HC374 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

GND

CLK

description/ordering information

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively

low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional

bus drivers, and working registers.

The eight flip-flops of the ’HC374 devices are edge-triggered D-type flip-flops. On the positive transition of the

clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.

An output-enable (OE

) input places the eight outputs in either a normal logic state (high or low logic levels) or

the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and increased drive provide the capability to drive bus lines without

interface or pullup components.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 20 SN74HC374N SN74HC374N

SOIC − DW

Tube of 25 SN74HC374DW

HC374

SOIC − DW

Reel of 2000 SN74HC374DWR

HC374

−40°C to 85°C

SOP − NS Reel of 2000 SN74HC374NSR HC374

−40 C to 85 C

SSOP − DB Reel of 2000 SN74HC374DBR HC374

TSSOP − PW

Tube of 2000 SN74HC374PWR

HC374

TSSOP − PW

Reel of 250 SN74HC374PWT

HC374

CDIP − J Tube of 20 SNJ54HC374J SNJ54HC374J

−55°C to 125°C

CFP − W Tube of 85 SNJ54HC374W SNJ54HC374W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC374FK SNJ54HC374FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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  

SCLS141E − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description/ordering information (continued)

OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE

should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE CLK D

OUTPUT

L ↑ H H

L ↑ LL

L H or L X Q

H X X Z

logic diagram (positive logic)

To Seven Other Channels

CLK

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, V

−0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

< 0 or V

> V

) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

< 0 or V

> V

) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

= 0 to V

) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through V

or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

 

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  

SCLS141E − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54HC374 SN74HC374

UNIT

MIN NOM MAX MIN NOM MAX

UNIT

Supply voltage 2 5 6 2 5 6 V

= 2 V 1.5 1.5

High-level input voltage

= 4.5 V

3.15 3.15

High-level input voltage

= 6 V 4.2 4.2

= 2 V 0.5 0.5

Low-level input voltage

= 4.5 V

1.35 1.35

Low-level input voltage

= 6 V 1.8 1.8

Input voltage 0 V

0 V

Output voltage 0 V

0 V

= 2 V 1000 1000

∆t/∆v Input transition rise/fall time

= 4.5 V

500 500

∆t/∆v

Input transition rise/fall time

= 6 V 400 400

Operating free-air temperature −55 125 −40 85 °C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

= 25°C SN54HC374 SN74HC374

UNIT

PARAMETER

TEST CONDITIONS

MIN TYP MAX MIN MAX MIN MAX

UNIT

2 V 1.9 1.998 1.9 1.9

= −20 µA

4.5 V 4.4 4.499 4.4 4.4

= V

or V

= −20 µA

6 V 5.9 5.999 5.9 5.9

= V

or V

= −6 mA 4.5 V 3.98 4.3 3.7 3.84

= −7.8 mA 6 V 5.48 5.8 5.2 5.34

2 V 0.002 0.1 0.1 0.1

= 20 µA

4.5 V 0.001 0.1 0.1 0.1

= V

or V

= 20 µA

6 V 0.001 0.1 0.1 0.1

= V

or V

= 6 mA 4.5 V 0.17 0.26 0.4 0.33

= 7.8 mA 6 V 0.15 0.26 0.4 0.33

= V

or 0 6 V ±0.1 ±100 ±1000 ±1000 nA

= V

or 0 6 V ±0.01 ±0.5 ±10 ±5 µA

= V

or 0, I

= 0 6 V 8 160 80 µA

2 V to 6 V 3 10 10 10 pF

Part #	84071012A
Description	IC, OCT EDGE-TRIG F-FW/3-ST - Rail/Tube
Category	Microcircuit
Availability	In Stock
Qty	1

84071012A

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