TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA
FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT
HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN
SLOS232C - JUNE 1999 - REVISED AUGUST 2003
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
_
+
R
null
R
L
C
L
Figure 41
APPLICATION INFORMATION
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the
device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater
than 10 pF, it is recommended that a resistor be placed in series (R
NULL
) with the output of the amplifier, as
shown in Figure 42. A minimum value of 20 Ω should work well for most applications.
C
LOAD
R
F
Input
Output
R
G
R
NULL
_
+
Figure 42. Driving a Capacitive Load
offset voltage
The output offset voltage, (V
OO
) is the sum of the input offset voltage (V
IO
) and both input bias currents (I
IB
) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
V
OO
+ V
IO
ǒ
1 ) ǒ
R
F
R
G
Ǔ
Ǔ
" I
IB)
R
S
ǒ
1 ) ǒ
R
F
R
G
Ǔ
Ǔ
" I
IB–
R
F
+
-
V
I
+
R
G
R
S
R
F
I
IB-
V
O
I
IB+
Figure 43. Output Offset Voltage Model
