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SNJ54BCT8244AJT

Part # SNJ54BCT8244AJT
Description Scan Buffer/Line Driver 8-CHNon-Inverting 3-ST BiCMOS 24-
Category IC
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Texas Instruments
Date Code: 0001
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN54BCT8244A, SN74BCT8244A
SCAN TEST DEVICES
WITH OCTAL BUFFERS
SCBS042E – FEBRUARY 1990 – REVISED JULY 1996
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Members of the Texas Instruments
SCOPE
Family of Testability Products
Octal Test-Integrated Circuits
Functionally Equivalent to ’F244 and
’BCT244 in the Normal-Function Mode
Compatible With the IEEE Standard
1149.1-1990 (JTAG) Test Access Port and
Boundary-Scan Architecture
Test Operation Synchronous to Test
Access Port (TAP)
Implement Optional Test Reset Signal by
Recognizing a Double-High-Level Voltage
(10 V) on TMS Pin
SCOPE
Instruction Set
– IEEE Standard 1149.1-1990 Required
Instructions, Optional INTEST, CLAMP
and HIGHZ
– Parallel-Signature Analysis at Inputs
– Pseudo-Random Pattern Generation
From Outputs
– Sample Inputs/Toggle Outputs
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
and Ceramic 300-mil DIPs (JT, NT)
description
The ’BCT8244A scan test devices with octal
buffers are members of the Texas Instruments
SCOPE testability integrated-circuit family. This
family of devices supports IEEE Standard
1149.1-1990 boundary scan to facilitate testing of
complex circuit-board assemblies. Scan access
to the test circuitry is accomplished via the 4-wire
test access port (TAP) interface.
In the normal mode, these devices are functionally equivalent to the ’F244 and ’BCT244 octal buffers. The test
circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals
or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the
functional operation of the SCOPE octal buffers.
In the test mode, the normal operation of the SCOPE octal buffers is inhibited and the test circuitry is enabled
to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform
boundary-scan test operations, as described in IEEE Standard 1149.1-1990.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SCOPE is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
1OE
1Y1
1Y2
1Y3
1Y4
GND
2Y1
2Y2
2Y3
2Y4
TDO
TMS
2OE
1A1
1A2
1A3
1A4
2A1
V
CC
2A2
2A3
2A4
TDI
TCK
SN54BCT8244A . . . JT PACKAGE
SN74BCT8244A ... DW OR NT PACKAGE
(TOP VIEW)
3212827
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
2A4
TDI
TCK
NC
TMS
TDO
2Y4
1A2
1A1
2OE
NC
1OE
1Y1
1Y2
426
14 15 16 17
18
1Y3
1Y4
GND
NC
2Y1
2Y2
2Y3
1A3
1A4
2A1
NC
V
2A2
2A3
SN54BCT8244A . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
CC
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54BCT8244A, SN74BCT8244A
SCAN TEST DEVICES
WITH OCTAL BUFFERS
SCBS042E – FEBRUARY 1990 – REVISED JULY 1996
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description (continued)
Four dedicated test terminals control the operation of the test circuitry: test data input (TDI), test data output
(TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing
functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation
(PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.
The SN54BCT8244A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74BCT8244A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(normal mode, each buffer)
INPUTS
OUTPUT
OE A
Y
H X Z
L LL
L H H
logic symbol
SCAN
’BCT8244A
23
1A1 1Y1
2
TDI
14
TDI
TCK-IN
EN1
1
22
1A2
1Y2
3
TMS
12
TMS
13
TCK
EN2
24
TCK-OUT
21
1A3 1Y3
4
20
1A4 1Y4
5
19
2A1 2Y1
7
17
2A2
2Y2
8
16
2A3 2Y3
9
15
2A4
2Y4
10
2OE
1OE
Φ
1
2
TDO
11
TDO
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
SN54BCT8244A, SN74BCT8244A
SCAN TEST DEVICES
WITH OCTAL BUFFERS
SCBS042E – FEBRUARY 1990 – REVISED JULY 1996
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
functional block diagram
Boundary-Control
Register
Bypass Register
Boundary-Scan Register
Instruction Register
TDI
TMS
TCK
TDO
TAP
Controller
V
CC
V
CC
1OE
1A1
V
CC
V
CC
V
CC
V
CC
One of Four Channels
2OE
2A1
V
CC
V
CC
One of Four Channels
1
23
24
19
14
12
13
2Y1
1Y1
2
7
11
Pin numbers shown are for the DW, JT, and NT packages.
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