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DP83847
6.4.3 100BASE-TX Transmit Packet Latency Timing
Note: Latency is determined by measuring the time from the first rising edge of TX_CLK occurring after the assertion of
TX_EN to the first bit of the “J” code group as output from the TD± pins.
6.4.4 100BASE-TX Transmit Packet Deassertion Timing
Note: Deassertion is determined by measuring the time from the first rising edge of TX_CLK occurring after the deasser-
tion of TX_EN to the first bit of the “T” code group as output from the TD± pins.
Parameter Description Notes Min Typ Max Units
T4.3.1 TX_CLK to TD± Latency 6.0 bit times
Parameter Description Notes Min Typ Max Units
T4.4.1 TX_CLK to TD± Deassertion 6.0 bit times
TX_CLK
TX_EN
TXD
TD±
(J/K) IDLE DATA
T4.3.1
TX_CLK
TXD
TX_EN
TD±
DATA IDLE
T4.4.1
DATA IDLE
(T/R)
