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MSP430F2274TRHAT

Part # MSP430F2274TRHAT
Description MCU 16-bit MSP430 MSP430 RISC32KB Flash 2.5V/3.3V 40-Pin
Category IC
Availability In Stock
Qty 214
Qty Price
1 - 44 $3.57032
45 - 89 $2.84003
90 - 134 $2.67774
135 - 179 $2.48841
180 + $2.21793
Manufacturer Available Qty
Texas Instruments
Date Code: 0706
  • Shipping Freelance Stock: 198
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Texas Instruments
Date Code: 0712
  • Shipping Freelance Stock: 16
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

MSP430x22x2, MSP430x22x4
MIXED SIGNAL MICROCONTROLLER
SLAS504B − JULY 2006 − REVISED JULY 2007
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
Terminal Functions, MSP430x22x4 (Continued)
TERMINAL
NAME
DA RHA
I/O
DESCRIPTION
NAME
NO. NO.
I/O
DESCRIPTION
P3.5/
UCA0RXD/UCA0SOMI
26 24 I/O General-purpose digital I/O pin
USCI_A0 receive data input in UART mode, slave out/master in in SPI mode
P3.6/A6/OA0I2 27 25 I/O General-purpose digital I/O pin
ADC10 analog input A6 / OA0 analog input I2
P3.7/A7/OA1I2 28 26 I/O General-purpose digital I/O pin
ADC10 analog input A7 / OA1 analog input I2
P4.0/TB0 17 15 I/O General-purpose digital I/O pin
Timer_B, capture: CCI0A input, compare: OUT0 output
P4.1/TB1 18 16 I/O General-purpose digital I/O pin
Timer_B, capture: CCI1A input, compare: OUT1 output
P4.2/TB2 19 17 I/O General-purpose digital I/O pin
Timer_B, capture: CCI2A input, compare: OUT2 output
P4.3/TB0/
A12/OA0O
20 18 I/O General-purpose digital I/O pin
Timer_B, capture: CCI0B input, compare: OUT0 output
ADC10 analog input A12 / OA0 analog output
P4.4/TB1
A13/OA1O
21 19 I/O General-purpose digital I/O pin
Timer_B, capture: CCI1B input, compare: OUT1 output
ADC10 analog input A13 / OA1 analog output
P4.5/TB2
A14/OA0I3
22 20 I/O General-purpose digital I/O pin
Timer_B, compare: OUT2 output
ADC10 analog input A14 / OA0 analog input I3
P4.6/TBOUTH
A15/OA1I3
23 21 I/O General-purpose digital I/O pin
Timer_B, switch all TB0 to TB3 outputs to high impedance
ADC10 analog input A15 / OA1 analog input I3
P4.7/TBCLK 24 22 I/O General-purpose digital I/O pin
Timer_B, clock signal TBCLK input
RST/NMI/SBWTDIO 7 5 I Reset or nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
TEST/SBWTCK 1 37 I Selects test mode for JTAG pins on Port1. The device protection fuse is
connected to TEST.
Spy-Bi-Wire test clock input during programming and test
DV
CC
2 38, 39 Digital supply voltage
AV
CC
16 14 Analog supply voltage
DV
SS
4 1, 4 Digital ground reference
AV
SS
15 13 Analog ground reference
QFN Pad NA Package
Pad
NA QFN package pad connection to DV
SS
recommended.
TDO or TDI is selected via JTAG instruction.
NOTE: If XOUT/P2.7/CA7 is used as an input, excess current will flow until P2SEL.7 is cleared. This is due to the oscillator output driver connection
to this pad after reset.
General-Purpose Register
Program Counter
Stack Pointer
Status Register
Constant Generator
General-Purpose Register
General-Purpose Register
General-Purpose Register
PC/R0
SP/R1
SR/CG1/R2
CG2/R3
R4
R5
R12
R13
General-Purpose Register
General-Purpose Register
R6
R7
General-Purpose Register
General-Purpose Register
R8
R9
General-Purpose Register
General-Purpose Register
R10
R11
General-Purpose Register
General-Purpose Register
R14
R15
MSP430x22x2, MSP430x22x4
MIXED SIGNAL MICROCONTROLLER
SLAS504B − JULY 2006 − REVISED JULY 2007
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
short-form description
CPU
The MSP430 CPU has a 16-bit RISC architecture
that is highly transparent to the application. All
operations, other than program-flow instructions,
are performed as register operations in
conjunction with seven addressing modes for
source operand and four addressing modes for
destination operand.
The CPU is integrated with 16 registers that
provide reduced instruction execution time. The
register-to-register operation execution time is
one cycle of the CPU clock.
Four of the registers, R0 to R3, are dedicated as
program counter, stack pointer, status register,
and constant generator respectively. The
remaining registers are general-purpose
registers.
Peripherals are connected to the CPU using data,
address, and control buses, and can be handled
with all instructions.
instruction set
The instruction set consists of 51 instructions with
three formats and seven address modes. Each
instruction can operate on word and byte data.
Table 1 shows examples of the three types of
instruction formats; the address modes are listed
in Table 2.
Table 1. Instruction Word Formats
Dual operands, source-destination e.g., ADD R4,R5 R4 + R5 −−−> R5
Single operands, destination only e.g., CALL R8 PC −−> (TOS), R8−−> PC
Relative jump, un/conditional e.g., JNE Jump-on-equal bit = 0
Table 2. Address Mode Descriptions
ADDRESS MODE S D SYNTAX EXAMPLE OPERATION
Register F
F
MOV Rs,Rd MOV R10,R11 R10 −−> R11
Indexed F F MOV X(Rn),Y(Rm) MOV 2(R5),6(R6) M(2+R5)−−> M(6+R6)
Symbolic (PC relative) F F MOV EDE,TONI M(EDE) −−> M(TONI)
Absolute F F MOV &MEM,&TCDAT M(MEM) −−> M(TCDAT)
Indirect F MOV @Rn,Y(Rm) MOV @R10,Tab(R6) M(R10) −−> M(Tab+R6)
Indirect
autoincrement
F MOV @Rn+,Rm MOV @R10+,R11
M(R10) −−> R11
R10 + 2−−> R10
Immediate F MOV #X,TONI MOV #45,TONI #45 −−> M(TONI)
NOTE: S = source D = destination
MSP430x22x2, MSP430x22x4
MIXED SIGNAL MICROCONTROLLER
SLAS504B − JULY 2006 − REVISED JULY 2007
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
operating modes
The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt
event can wake up the device from any of the five low-power modes, service the request, and restore back to
the low-power mode on return from the interrupt program.
The following six operating modes can be configured by software:
D Active mode (AM)
All clocks are active
D Low-power mode 0 (LPM0)
CPU is disabled
ACLK and SMCLK remain active
MCLK is disabled
D Low-power mode 1 (LPM1)
CPU is disabled
ACLK and SMCLK remain active
MCLK is disabled
DCO’s dc-generator is disabled if DCO not used in active mode
D Low-power mode 2 (LPM2)
CPU is disabled
MCLK and SMCLK are disabled
DCO’s dc-generator remains enabled
ACLK remains active
D Low-power mode 3 (LPM3)
CPU is disabled
MCLK and SMCLK are disabled
DCO’s dc-generator is disabled
ACLK remains active
D Low-power mode 4 (LPM4)
CPU is disabled
ACLK is disabled
MCLK and SMCLK are disabled
DCO’s dc-generator is disabled
Crystal oscillator is stopped
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