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CA3083

Part # CA3083
Description TRANS 5NPN 15V 0.1A 16DIP
Category IC
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RCA
Date Code: 8640
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Copyright © Intersil Corporation 1999
CA3083
General Purpose High Current NPN
Transistor Array
The CA3083 is a versatile array of five high current (to
100mA) NPN transistors on a common monolithic substrate.
In addition, two of these transistors (Q
1
and Q
2
) are
matched at low current (i.e., 1mA) for applications in which
offset parameters are of special importance.
Independent connections for each transistor plus a separate
terminal for the substrate permit maximum flexibility in circuit
design
.
Pinout
CA3083
(PDIP, SOIC)
TOP VIEW
Features
High I
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA (Max)
•Low V
CE sat
(at 50mA). . . . . . . . . . . . . . . . . . 0.7V (Max)
Matched Pair (Q
1
and Q
2
)
-V
IO
(V
BE
Match). . . . . . . . . . . . . . . . . . . . ±5mV (Max)
-I
IO
(at 1mA). . . . . . . . . . . . . . . . . . . . . . . . 2.5µA (Max)
5 Independent Transistors Plus Separate Substrate
Connection
Applications
Signal Processing and Switching Systems Operating from
DC to VHF
Lamp and Relay Driver
Differential Amplifier
Temperature Compensated Amplifier
Thyristor Firing
See Application Note AN5296 “Applications of the
CA3018 Circuit Transistor Array” for Suggested
Applications
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (
o
C) PACKAGE
PKG.
NO.
CA3083 -55 to 125 16 Ld PDIP E16.3
CA3083M
(3083)
-55 to 125 16 Ld SOIC M16.15
CA3083M96
(3083)
-55 to 125 16 Ld SOIC Tape
and Reel
M16.15
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
SUBSTRATE
Q
1
Q
2
Q
3
Q
4
Q
5
Data Sheet September 1998 File Number 481.4
2
Absolute Maximum Ratings Thermal Information
The following ratings apply for each transistor in the device:
Collector-to-Emitter Voltage, V
CEO
. . . . . . . . . . . . . . . . . . . . . . 15V
Collector-to-Base Voltage, V
CBO
. . . . . . . . . . . . . . . . . . . . . . . . 20V
Collector-to-Substrate Voltage, V
CIO
(Note 1). . . . . . . . . . . . . . 20V
Emitter-to-Base Voltage, V
EBO
. . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Collector Current (I
C
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Base Current (I
B
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Thermal Resistance (Typical, Note 2) θ
JA
(
o
C/W) θ
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 135 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 200 N/A
Maximum Power Dissipation (Any One Transistor) . . . . . . . 500mW
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3083 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage
which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To avoid
undesired coupling between transistors, the substrate Terminal (5) should be maintained at either DC or signal (AC) ground. A suitable bypass
capacitor can be used to establish a signal ground.
2. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications For Equipment Design, T
A
= 25
o
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
FOR EACH TRANSISTOR
Collector-to-Base Breakdown Voltage V
(BR)CBO
I
C
= 100µA, I
E
= 0 20 60 - V
Collector-to-Emitter Breakdown Voltage V
(BR)CEO
I
C
= 1mA, I
B
= 0 15 24 - V
Collector-to-Substrate Breakdown Voltage V
(BR)CIO
I
CI
= 100µA, I
B
= 0, I
E
= 0 20 60 - V
Emitter-to-Base Breakdown Voltage V
(BR)EBO
I
E
= 500µA, I
C
= 0 5 6.9 - V
Collector-Cutoff-Current I
CEO
V
CE
= 10V, I
B
= 0 - - 10 µA
Collector-Cutoff-Current I
CBO
V
CB
= 10V, I
E
= 0 - - 1 µA
DC Forward-Current Transfer Ratio (Note 3) (Figure 1) h
FE
V
CE
= 3V I
C
= 10mA 40 76 -
I
C
= 50mA 40 75 -
Base-to-Emitter Voltage (Figure 2) V
BE
V
CE
= 3V, I
C
= 10mA 0.65 0.74 0.85 V
Collector-to-Emitter Saturation Voltage (Figures 3, 4) V
CE SAT
I
C
= 50mA, I
B
= 5mA - 0.40 0.70 V
Gain Bandwidth Product f
T
V
CE
= 3V, I
C
= 10mA - 450 - MHz
FOR TRANSISTORS Q
1
AND Q
2
(As a Differential Amplifier)
Absolute Input Offset Voltage (Figure 6) |V
IO
|V
CE
= 3V, I
C
= 1mA - 1.2 5 mV
Absolute Input Offset Current (Figure 7) |I
IO
|V
CE
= 3V, I
C
= 1mA - 0.7 2.5 µA
NOTE:
3. Actual forcing current is via the emitter for this test.
CA3083
3
Typical Performance Curves
FIGURE 1. h
FE
vs I
C
FIGURE 2. V
BE
vs I
C
FIGURE 3. V
CE SAT
vs I
C
FIGURE 4. V
CE SAT
vs I
C
FIGURE 5. V
BE SAT
vs I
C
FIGURE 6. V
IO
vs I
C
(TRANSISTORS Q
1
AND Q
2
AS A
DIFFERENTIAL AMPLIFIER)
V
CE
= 3V
COLLECTOR CURRENT (mA)
DC FORWARD CURRENT TRANSFER RATIO
T
A
= 0
o
C
T
A
= 25
o
C
0.1 1 10 100
60
50
70
80
90
100
T
A
= 70
o
C
V
CE
= 3V
COLLECTOR CURRENT (mA)
BASE-TO-EMITTER VOLTAGE (V)
T
A
= 70
o
C
T
A
= 25
o
C
0.1 1 10 100
0.6
0.5
0.7
0.8
0.9
T
A
= 0
o
C
h
FE
= 10, T
A
= 25
o
C
COLLECTOR CURRENT (mA)
COLLECTOR-TO-EMITTER
1 10 100
0.2
0
0.4
0.6
0.8
1
MAXIMUM
TYPICAL
SATURATION VOLTAGE (V)
COLLECTOR CURRENT (mA)
COLLECTOR-TO-EMITTER
1 10 100
0.2
0
0.4
0.6
0.8
1
1.2
MAXIMUM
h
FE
= 10, T
A
= 70
o
C
TYPICAL
SATURATION VOLTAGE (V)
h
FE
= 10, T
A
= 25
o
C
COLLECTOR CURRENT (mA)
BASE-TO-EMITTER
1 10 100
0.6
0.5
0.7
0.8
0.9
1
SATURATION VOLTAGE (V)
V
CE
= 3V, T
A
= 25
o
C
COLLECTOR CURRENT (mA)
ABSOLUTE INPUT OFFSET VOLTAGE (mV)
0.1 1 10
1
0
2
3
4
5
6
CA3083
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