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C8051F321-GMR

Part # C8051F321-GMR
Description 16KB,10ADC,USB,28PIN MCU (LEAD FREE) MLP28 -40 TO 85 DEG.
Category IC
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SILICON LABS
Date Code: 0603
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Rev. 1.4 121
C8051F320/1
SFR Definition 13.3. OSCXCN: External Oscillator Control
Bit7: XTLVLD: Crystal Oscillator Valid Flag.
(Read only when XOSCMD = 11x.)
0: Crystal Oscillator is unused or not yet stable.
1: Crystal Oscillator is running and stable.
Bits6–4: XOSCMD2–0: External Oscillator Mode Bits.
00x: External Oscillator circuit off.
010: External CMOS Clock Mode.
011: External CMOS Clock Mode with divide by 2 stage.
100: RC Oscillator Mode.
101: Capacitor Oscillator Mode.
110: Crystal Oscillator Mode.
111: Crystal Oscillator Mode with divide by 2 stage.
Bit3: RESERVED. Read = 0, Write = don't care.
Bits2–0: XFCN2–0: External Oscillator Frequency Control Bits.
000–111: See table below:
CRYSTAL MODE (Circuit from Figure 13.1, Option 1; XOSCMD = 11x)
Choose XFCN value to match crystal or resonator frequency.
RC MODE (Circuit from Figure 13.1, Option 2; XOSCMD = 10x)
Choose XFCN value to match frequency range:
f = 1.23(10
3
) / (R * C), where
f = frequency of clock in MHz
C = capacitor value in pF
R = Pull-up resistor value in k
C MODE (Circuit from Figure 13.1, Option 3; XOSCMD = 10x)
Choose K Factor (KF) for the oscillation frequency desired:
f = KF / (C * VDD), where
f = frequency of clock in MHz
C = capacitor value the XTAL2 pin in pF
VDD = Power Supply on MCU in volts
R R/W R/W R/W R R/W R/W R/W Reset Value
XTLVLD XOSCMD2 XOSCMD1 XOSCMD0 - XFCN2 XFCN1 XFCN0 00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address:
0xB1
XFCN Crystal (XOSCMD = 11x) RC (XOSCMD = 10x) C (XOSCMD = 10x)
000 f 32 kHz f 25 kHz K Factor = 0.87
001 32 kHz f 84 kHz 25 kHz f 50 kHz K Factor = 2.6
010 84 kHz f 225 kHz 50 kHz f 100 kHz K Factor = 7.7
011 225 kHz f 590 kHz 100 kHz f 200 kHz K Factor = 22
100 590 kHz f 1.5 MHz 200 kHz f 400 kHz K Factor = 65
101 1.5 MHz f 4 MHz 400 kHz f 800 kHz K Factor = 180
110 4 MHz f 10 MHz 800 kHz f 1.6 MHz K Factor = 664
111 10 MHz f 30 MHz 1.6 MHz f 3.2 MHz K Factor = 1590
C8051F320/1
122 Rev. 1.4
13.3. 4x Clock Multiplier
The 4x Clock Multiplier allows a 12 MHz oscillator to generate the 48 MHz clock required for Full Speed
USB communication (see Section “15.4. USB Clock Configuration” on page 146). A divided version of the
Multiplier output can also be used as the sy
stem clock. See Section 13.4 for details on system clock and
USB clock source selection.
The 4x Clock Multiplier is configured via the CLKMUL register. The procedure for configuring and enabling
the 4x
Clock Multiplier is as follows:
1. Reset the Multiplier by writin
g 0x00 to register CLKMUL.
2. Select the Multiplier input source via the MULSEL bits.
3. Enable the Multiplier with the MULEN bit (CLKMUL | = 0x80).
4. Delay for >5 µs.
5. Initialize the Multiplier w
ith the MULINIT bit (CLKMUL | = 0xC0).
6. Poll for MULRDY => ‘1’.
Important Note: When using an external oscillator as the input to the 4x Clock Multiplier, the exter-
nal source must be enabled and stable befo
re the Multiplier is initialized. See Section 13.4 for
details on selecting an external oscillator source.
SFR Definition 13.4. CLKMUL: Clock Multiplier Control
Bit7: MULEN: Clock Multiplier Enable
0: Clock Multiplier disabled.
1: Clock Multiplier enabled.
Bit6: MULINIT: Clock Multiplier Initialize
This bit should be a ‘0’ when the Clock Multiplier is enabled. Once enabled, writing a ‘1’ to
this bit will initialize the Clock Multiplier. The MULRDY bit reads ‘1’ when the Clock Multiplier
is stabilized.
Bit5: MULRDY: Clock Multiplier Ready
This read-only bit indicates the status of the Clock Multiplier.
0: Clock Multiplier not ready.
1: Clock Multiplier ready (locked).
Bits4–2: Unused. Read = 000b; Write = don’t care.
Bits1–0: MULSEL: Clock Multiplier Input Select
These bits select the clock supplied to the Clock Multiplier.
R/W R/W R R/W R/W R/W R/W R/W Reset Value
MULEN MULINIT MULRDY - - - MULSEL 00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address
0xB9
MULSEL Selected Clock
00 Internal Oscillator
01 External Oscillator
10 External Oscillator / 2
11 RESERVED
Rev. 1.4 123
C8051F320/1
13.4. System and USB Clock Selection
The internal oscillator requires little start-up time and may be selected as the system or USB clock immedi-
ately following the OSCICN write
that enables the internal oscillator. External crystals and ceramic resona-
tors typically require a start-up time before they are settled and ready for use. The Crystal Valid Flag
(XTL
VLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To avoid
reading a false XTLVLD, in crystal mode software should delay at least 1 ms between enabling the
e
xternal oscillator and checking XTLVLD. RC and C modes typically require no startup time.
13.4.1. System Clock Selection
The CLKSL[1:0] bits in register CLKSEL select which oscillator source is used as the system clock.
CLKSL[1:0] must be set to 01b for the system clock to run from the external oscillator; however the exter-
nal oscillator may still clock certain peripherals (timers, PCA
, USB) when the internal oscillator is selected
as the system clock. The system clock may be switched on-the-fly between the internal oscillator, external
oscillator, and 4x Clock Multiplier so long as the selected oscillator is enabled and has settled.
13.4.2. USB Clock Selection
The USBCLK[2:0] bits in register CLKSEL select which oscillator source is used as the USB clock. The
USB clock may be derived from the 4x Clock Multiplier output, a divided version of the internal oscillator, or
a divided version of the external oscillator. Note that the USB clock must be 48 MHz when operating USB0
as
a Full Speed Function; the USB clock must be 6 MHz when operating USB0 as a Low Speed Function.
See Figure 13.5 for USB clock selection options.
Some example USB clock configurations for Full and Low Speed mode are given below:
Table 13.1. Typical USB Full Speed Clock Settings
Internal Oscillator
Clock Signal Input Source Selection Register Bit Settings
USB Clock Clock Multiplier USBCLK = 000b
Clock Multiplier Input Internal Oscillator* MULSEL = 00b
Internal Oscillator Divide by 1 IFCN = 11b
External Oscillator
Clock Signal Input Source Selection Register Bit Settings
USB Clock Clock Multiplier USBCLK = 000b
Clock Multiplier Input External Oscillator MULSEL = 01b
External Oscillator
Crystal Oscillator Mode
12 MHz Crystal
XOSCMD = 110b
XFCN = 111b
*Note: Clock Recovery must be enabled for this configuration.
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