C8051F041-GQ

Cross Number:

Item Description: MCU 8BIT CISC 64KB FLASH 3V 64TQFP - Trays
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Mixed Signal ISP Flash MCU Family
C8051F040/1/2/3/4/5/6/7
Rev. 1.5 12/05 Copyright © 2005 by Silicon Laboratories C8051F04x
Analog Peripherals
- 10 or 12-Bit SAR ADC
12-bit (C8051F040/1) or
10-bit (C8051F042/3/4/5/6/7) resolution
± 1 LSB INL, guaranteed no missing codes
Progr
ammable throughput up to 100 ksps
13 External Input
s; single-ended or differential
SW progr
ammable high voltage difference amplifier
Progr
ammable amplifier gain: 16, 8, 4, 2, 1, 0.5
Dat
a-dependent windowed interrupt generator
Built-in temper
ature sensor
- 8-bit SAR ADC (C8051F040/1/2/3 only)
Programmable throughput up to 500 ksps
8 Ext
ernal Inputs, single-ended or differential
Progr
ammable amplifier gain: 4, 2, 1, 0.5
- Two 12-bit DACs (C8051F040/1/2/3 only)
Can synchronize outputs to timers for jitter-free wave-
form generation
- Three Analog Comparators
Programmable hysteresis/response time
- Voltage Reference
- Precision V
DD
Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
-
On-chip debug circuitry facilitates full- speed, non-
intrusive in-circuit/in-system debugging
- Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- IEEE1149.1 compliant boundary scan
- Complete development kit
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
instruction set in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- 20 vectored interrupt sources
Memory
-
4352 bytes internal data RAM (4 k + 256)
- 64 kB (C8051F040/1/2/3/4/5)
or 32 kB (C8051F046/7) Flash; in-system program-
mable in 512-byte sectors
- External 64 kB data memory interface (programma-
ble multiplexed or non-multiplexed modes)
Digital Peripherals
-
8 byte-wide port I/O (C8051F040/2/4/6); 5 V tolerant
- 4 byte-wide port I/O (C8051F041/3/5/7); 5 V tolerant
- Bosch Controller Area Network (CAN 2.0B), hard-
ware SMBus™ (I
2
C™ Compatible), SPI™, and
two UART serial ports available concurrently
- Programmable 16-bit counter/timer array with
6 capture/compare modules
- 5 general purpose 16-bit counter/timers
- Dedicated watch-dog timer; bi-directional reset pin
Clock Sources
-
Internal calibrated programmable oscillator: 3 to
24.5 MHz
- External oscillator: crystal, RC, C, or clock
- Real-time clock mode using Timer 2, 3, 4, or PCA
Supply Voltage: 2.7 to 3.6 V
-
Multiple power saving sleep and shutdown modes
100-Pin and 64-Pin TQFP Packages Available
-
Temperature Range: –40 to +85 °C
JTAG
64 kB/32 kB
ISP FLASH
4352 B
SRAM
SANITY
CONTROL
+
-
12/10-bit
100 ksps
ADC
CLOCK
CIRCUIT
PGA
VREF
12-Bit
DAC
TEMP
SENSOR
VOLTAGE COMPARATORS
ANALOG PERIPHERALS
Port 0
Port 1
Port 2
Port 3
CROSSBAR
DIGITAL I/O
HIGH-SPEED CONTROLLER CORE
DEBUG
CIRCUITRY
20
INTERRUPTS
8051 CPU
(25 MIPS)
+
-
8-bit
500 ksps
ADC
Port 4
Port 5
Port 6
Port 7
External Memory Interface
100 pin64 pin
PGA
UART0
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
UART1
AMUX
AMUX
CAN
2.0B
+
-
HV
DIFF
AMP
12-Bit
DAC
C8051F041/2/3
ONLY
C8051F040/1/2/3/4/5/6/7
2 Rev. 1.5
C8051F040/1/2/3/4/5/6/7
Rev. 1.5 3
Table of Contents
1. System Overview.................................................................................................... 19
1.1. CIP-51™ Microcontroller Core.......................................................................... 25
1.1.1. Fully 8051 Compatible.............................................................................. 25
1.1.2. Improved Throughput............................................................................... 25
1.1.3. Additional Features .................................................................................. 26
1.2. On-Chip Memory............................................................................................... 27
1.3. JTAG Debug and Boundary Scan..................................................................... 28
1.4. Programmable Digital I/O and Crossbar........................................................... 29
1.5. Programmable Counter Array........................................................................... 30
1.6. Controller Area Network.................................................................................... 31
1.7. Serial Ports ....................................................................................................... 31
1.8. 12/10-Bit Analog to Digital Converter................................................................ 32
1.9. 8-Bit Analog to Digital Converter (C8051F040/1/2/3 Only)............................... 33
1.10.Comparators and DACs ................................................................................... 34
2. Absolute Maximum Ratings .................................................................................. 35
3. Global DC Electrical Characteristic ...................................................................... 36
4. Pinout and Package Definitions............................................................................ 37
5. 12-Bit ADC (ADC0, C8051F040/1 Only)................................................................. 47
5.1. Analog Multiplexer and PGA............................................................................. 47
5.1.1. Analog Input Configuration....................................................................... 48
5.2. High-Voltage Difference Amplifier..................................................................... 52
5.3. ADC Modes of Operation.................................................................................. 54
5.3.1. Starting a Conversion............................................................................... 54
5.3.2. Tracking Modes........................................................................................ 54
5.3.3. Settling Time Requirements..................................................................... 56
5.4. ADC0 Programmable Window Detector ........................................................... 62
6. 10-Bit ADC (ADC0, C8051F042/3/4/5/6/7 Only)..................................................... 69
6.1. Analog Multiplexer and PGA............................................................................. 69
6.1.1. Analog Input Configuration....................................................................... 70
6.2. High-Voltage Difference Amplifier..................................................................... 74
6.3. ADC Modes of Operation.................................................................................. 76
6.3.1. Starting a Conversion............................................................................... 76
6.3.2. Tracking Modes........................................................................................ 76
6.3.3. Settling Time Requirements..................................................................... 78
6.4. ADC0 Programmable Window Detector ........................................................... 84
7. 8-Bit ADC (ADC2, C8051F040/1/2/3 Only)
............................................................. 91
7.1. Analog Multiplexer and PGA............................................................................. 91
7.2. ADC2 Modes of Operation................................................................................ 92
7.2.1. Starting a Conversion............................................................................... 92
7.2.2. Tracking Modes........................................................................................ 92
7.2.3. Settling Time Requirements..................................................................... 94
7.3. ADC2 Programmable Window Detector ......................................................... 100
7.3.1. Window Detector in Single-Ended Mode................................................ 100
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