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C8051F321-GMR

Part # C8051F321-GMR
Description 16KB,10ADC,USB,28PIN MCU (LEAD FREE) MLP28 -40 TO 85 DEG.
Category IC
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SILICON LABS
Date Code: 0603
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

C8051F320/1
106 Rev. 1.4
11. Flash Memory
On-chip, re-programmable Flash memory is included for program code and non-volatile data storage. The
Flash memory can be programmed in-system, a single byte at a time, through the C2 interface or by soft-
ware using the MOVX instruction. Once cleared to logic 0, a F
lash bit must be erased to set it back to logic
1. Flash bytes would typically be erased (set to 0xFF) before being reprogrammed. The write and erase
operations are automatically timed by hardware for proper execution; data polling to determine the end of
the write/erase operation is not required. Code execution is stalled during a Flash write/erase operation.
Refer to Table 11.1 for complete Flash memory electrical characteristics.
11.1. Programming The Flash Memory
The simplest means of programming the Flash memory is through the C2 interface using programming
tools provided by Silicon Labs or a third party vendor. This is the only means for programming a non-initial-
ized device. For details on the C2 commands to program Flash memory, see Section “21. C2 Interface” on
page 245.
To ensure the integrity of Flash contents, it is strongly recommended that the on-chip VDD Monitor
be
enabled in any system that includes code that writes and/or erases Flash memory from soft-
ware.
11.1.1. Flash Lock and Key Functions
Flash writes and erases by user software are protected with a lock and key function. The Flash Lock and
Key Register (FLKEY) must be written with the correct key codes, in sequence, before Flash operations
may be performed. The key codes are: 0xA5, 0xF1. The timing does not matter, but the codes must be
written in order. If the key codes are written out of order, or the wrong codes are written, Flash writes and
erases will be disabled until the next system reset. Flash writes and erases will also be disabled if a Flash
write or erase is attempted before the key codes have been written properly. The Flash lock resets after
each write or erase; the key codes must be written again before a following Flash operation can be per-
formed. The FLKEY register is det
ailed in Figure 11.2.
11.1.2. Flash Erase Procedure
The Flash memory can be programmed by software using the MOVX write instruction with the address and
data byte to be programmed provided as normal operands. Before writing to Flash memory using MOVX,
Flash write operations must be enabled by: (1) Writing the Flash key codes in sequence to the Flash Lock
register (FLKEY); and (2) Setting the PSWE Program Store Write Enable bit (PSCTL.0) to logic 1 (this
directs the MOVX writes to target Flash memory). The PSWE bit remains set until cleared by software.
A write to Flash memory can clear bits to logic 0 but cann
ot set them; only an erase operation can set bits
to logic 1 in Flash. A byte location to be programmed must be erased before a new value is written.
The Flash memory is organized in 512-byte pages. The erase operation applies to an entire page (setting
all bytes in the page to 0xFF). To erase an entire 512-byte page, perform the following steps:
Step 1. Disable interrupts (recommended).
S
tep 2. Write the first key code to FLKEY: 0xA5.
Step 3. Write the second key code to FLKEY: 0xF1.
Step 4. Set the PSEE bit (register PSCTL).
Step 5. Set the PSWE bit (register PSCTL).
Step 6. Using the MOVX instruction, write a data byte to any location within the 512-byte page to
be erased.
Step 7. Clear the PSWE bit (register PSCTL).
Step 8. Clear the PSEE bit (register PSCTI).
Rev. 1.4 107
C8051F320/1
11.1.3. Flash Write Procedure
Flash bytes are programmed by software with the following sequence:
Step 1. Disable interrupts (recommended).
St
ep 2. Erase the 512-byte Flash page containing the target location, as described in Section
11.1.2.
Step 3. Write the first key code to FLKEY: 0xA5.
Step 4. Write the second key code to FLKEY: 0xF1.
Step 5. Set the PSWE bit (register PSCTL).
Step 6. Clear the PSEE bit (register PSCTL).
Step 7. Using the MOVX instruction, write a single data byte to the desired location within the 512-
byte sector.
Step 8. Clear the PSWE bit (register PSCTL).
Steps 3-8 must be repeated for each byte to be written. After Flash writes are complete, PSWE should be
clea
re
d so that MOVX instructions do not target program memory.
Table 11.1. Flash Electrical Characteristics
*Note: 512 bytes at location 0x3E00 to 0x3FFF are reserved.
11.2. Non-volatile Data Storage
The Flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written using the MOVX
write instruction and read using the MOVC instruction. Note: MOVX read instructions always target XRAM.
Parameter Conditions Min Typ Max Units
Flas
h Size C8051F320/1 16384* bytes
Endurance 20k 100k Erase/Write
Erase Cycle Time 25 MHz System Clock 10 15 20 ms
Write Cycle Time 25 MHz System Clock 40 55 70 µs
C8051F320/1
108 Rev. 1.4
11.3. Security Options
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Wr
ite Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to ‘1’ before software can modify the Flash memory; both PSWE and PSEE must be set to ‘1’ before
software can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located at the last byte of Flash user space offers protection of the Flash program
memory from access (reads, writes, or erases) by unprotected code or the C2 interface. The Flash security
mechanism allows the user to lock n 512-byte Flash pages, starting at page 0 (addresses 0x0000 to
0x01FF), w
here n is the 1’s compliment number represented by the Security Lock Byte. See example below.
Important Notes About the Flash Security:
1. Clearing any bit of the Lock Byte to ‘0’ will lock
the Flash page containing the Lock Byte (in
addition to the selected pages).
2. Locked pages cannot be read, written, or erased via the C2 interface.
3. Locked pages cannot be read, written, or erase
d
by user firmware executing from unlocked
memory space.
4. User firmware executing in a locked page may read
and write Flash memory in any locked or
unlocked page excluding the reserved area.
5. User firmware executing in a locked page may erase F
lash memory in any locked or unlocked
page excluding the reserved area and the page containing the Lock Byte.
6. Locked pages can only be unlocked through the C2 interface with a C2 Device Erase com-
mand.
7. If a user firmware Flash access attempt is denie
d
(per restrictions #3, #4, and #5 above), a
Flash Error system reset will be generated.
Access limit set
according to the Flash
security lock byte
C8051F320/1
0x0000
0x3DFF
Lock Byte
Reserved
0x3DFE
0x3E00
Flash memory organized
in 512-byte pages
0x3C00
Unlocked Flash Pages
Locked when any
other Flash pages are
locked
Figure 11.1. Flash Program Memory Map and Security Byte
Security Lock Byte: 11111101b
1’s Compliment: 00000010b
Flash pages locked: 2
Addresses locked: 0x0000 to 0x03FF
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