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C8051F321-GMR

Part # C8051F321-GMR
Description 16KB,10ADC,USB,28PIN MCU (LEAD FREE) MLP28 -40 TO 85 DEG.
Category IC
Availability In Stock
Qty 560
Qty Price
1 - 24 $10.41286
25 - 60 $8.28296
61 - 128 $7.80964
129 - 275 $7.25745
276 + $6.46859
Manufacturer Available Qty
SILICON LABS
Date Code: 0603
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

C8051F320/1
4 Rev. 1.4
9.2.7. Register Descriptions ............................................................................... 83
9.3. Interrupt Handler............................................................................................... 87
9.3.1. MCU Interrupt Sources and Vectors ........................................................ 87
9.3.2. External Interrupts.................................................................................... 88
9.3.3. Interrupt Priorities..................................................................................... 88
9.3.4. Interrupt Latency ...................................................................................... 89
9.3.5. Interrupt Register Descriptions................................................................. 90
9.4. Power Management Modes.............................................................................. 97
9.4.1. Idle Mode.................................................................................................. 97
9.4.2. Stop Mode................................................................................................ 97
10.Reset Sources ....................................................................................................... 99
10.1.Power-On Reset............................................................................................. 100
10.2.Power-Fail Reset / VDD Monitor .................................................................... 101
10.3.External Reset................................................................................................ 102
10.4.Missing Clock Detector Reset ........................................................................ 102
10.5.Comparator0 Reset ........................................................................................ 102
10.6.PCA Watchdog Timer Reset .......................................................................... 102
10.7.Flash Error Reset ........................................................................................... 102
10.8.Software Reset............................................................................................... 103
10.9.USB Reset...................................................................................................... 103
11.Flash Memory ..................................................................................................... 106
11.1.Programming The Flash Memory................................................................... 106
11.1.1.Flash Lock and Key Functions............................................................... 106
11.1.2.Flash Erase Procedure .......................................................................... 106
11.1.3.Flash Write Procedure ........................................................................... 107
11.2.Non-volatile Data Storage .............................................................................. 107
11.3.Security Options ............................................................................................. 108
11.4.Flash Write and Erase Guidelines.................................................................. 110
11.4.1.VDD Maintenance and the VDD Monitor ............................................... 110
11.4.2.16.4.2 PSWE Maintenance.................................................................... 111
11.4.3.System Clock ......................................................................................... 111
12.External RAM ...................................................................................................... 114
12.1.Accessing User XRAM ................................................................................... 114
12.2.Accessing USB FIFO Space
.......................................................................... 114
13.Oscillators............................................................................................................. 116
13.1.Programmable Internal Oscillator................................................................... 116
13.1.1.Programming the Internal Oscillator on C8051F320/1 Devices............. 117
13.1.2.Internal Oscillator Suspend Mode.......................................................... 118
13.2.External Oscillator Drive Circuit...................................................................... 119
13.2.1.Clocking Timers Directly Through the External Oscillator...................... 119
13.2.2.External Crystal Example....................................................................... 119
13.2.3.External RC Example............................................................................. 120
13.2.4.External Capacitor Example................................................................... 120
13.3.4x Clock Multiplier .......................................................................................... 122
13.4.System and USB Clock Selection .................................................................. 123
Rev. 1.4 5
C8051F320/1
13.4.1.System Clock Selection ......................................................................... 123
13.4.2.USB Clock Selection.............................................................................. 123
14.Port Input/Output ................................................................................................ 126
14.1.Priority Crossbar Decoder .............................................................................. 128
14.2.Port I/O Initialization ....................................................................................... 130
14.3.General Purpose Port I/O............................................................................... 132
15.Universal Serial Bus Controller (USB)................................................................ 139
15.1.Endpoint Addressing ...................................................................................... 140
15.2.USB Transceiver ............................................................................................ 140
15.3.USB Register Access ..................................................................................... 142
15.4.USB Clock Configuration................................................................................ 146
15.5.FIFO Management ......................................................................................... 147
15.5.1.FIFO Split Mode..................................................................................... 147
15.5.2.FIFO Double Buffering ........................................................................... 148
15.5.3.FIFO Access .......................................................................................... 148
15.6.Function Addressing....................................................................................... 149
15.7.Function Configuration and Control................................................................ 149
15.8.Interrupts ........................................................................................................ 152
15.9.The Serial Interface Engine............................................................................ 157
15.10.Endpoint0 ..................................................................................................... 157
15.10.1.Endpoint0 SETUP Transactions .......................................................... 158
15.10.2.Endpoint0 IN Transactions................................................................... 158
15.10.3.Endpoint0 OUT Transactions............................................................... 159
15.11.Configuring Endpoints1–3 ............................................................................ 161
15.12.Controlling Endpoints1–3 IN......................................................................... 161
15.12.1.Endpoints1-3 IN Interrupt or Bulk Mode............................................... 161
15.12.2.Endpoints1-3 IN Isochronous Mode..................................................... 162
15.13.Controlling Endpoints1–3 OUT..................................................................... 164
15.13.1.Endpoints1-3 OUT Interrupt or Bulk Mode........................................... 164
15.13.2.Endpoints1-3 OUT Isochronous Mode................................................. 165
16.SMBus ................................................................................................................... 169
16.1.Supporting Documents................................................................................... 170
16.2.SMBus Configuration...................................................................................... 170
16.3.SMBus Operation ...........................................................................................
170
16.3.1.Arbitration............................................................................................... 171
16.3.2.Clock Low Extension.............................................................................. 171
16.3.3.SCL Low Timeout................................................................................... 171
16.3.4.SCL High (SMBus Free) Timeout .......................................................... 172
16.4.Using the SMBus............................................................................................ 172
16.4.1.SMBus Configuration Register............................................................... 173
16.4.2.SMB0CN Control Register ..................................................................... 176
16.4.3.Data Register ......................................................................................... 179
16.5.SMBus Transfer Modes.................................................................................. 180
16.5.1.Master Transmitter Mode....................................................................... 180
16.5.2.Master Receiver Mode........................................................................... 181
C8051F320/1
6 Rev. 1.4
16.5.3.Slave Receiver Mode............................................................................. 182
16.5.4.Slave Transmitter Mode......................................................................... 183
16.6.SMBus Status Decoding................................................................................. 184
17.UART0.................................................................................................................... 187
17.1.Enhanced Baud Rate Generation................................................................... 188
17.2.Operational Modes ......................................................................................... 188
17.2.1.8-Bit UART............................................................................................. 189
17.2.2.9-Bit UART............................................................................................. 190
17.3.Multiprocessor Communications .................................................................... 190
18.Enhanced Serial Peripheral Interface (SPI0)...................................................... 195
18.1.Signal Descriptions......................................................................................... 196
18.1.1.Master Out, Slave In (MOSI).................................................................. 196
18.1.2.Master In, Slave Out (MISO).................................................................. 196
18.1.3.Serial Clock (SCK) ................................................................................. 196
18.1.4.Slave Select (NSS) ................................................................................ 196
18.2.SPI0 Master Mode Operation......................................................................... 197
18.3.SPI0 Slave Mode Operation........................................................................... 198
18.4.SPI0 Interrupt Sources ................................................................................... 199
18.5.Serial Clock Timing......................................................................................... 199
18.6.SPI Special Function Registers...................................................................... 202
19.Timers ................................................................................................................... 209
19.1.Timer 0 and Timer 1 ....................................................................................... 209
19.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 209
19.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 211
19.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 211
19.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 212
19.2.Timer 2 .......................................................................................................... 217
19.2.1.16-bit Timer with Auto-Reload................................................................ 217
19.2.2.8-bit Timers with Auto-Reload................................................................ 218
19.2.3.USB Start-of-Frame Capture.................................................................. 219
19.3.Timer 3 .......................................................................................................... 222
19.3.1.16-bit Timer with Auto-Reload................................................................ 222
19.3.2.8-bit Timers with Auto-Reload................................................................ 223
19.3.3.USB Start-of-Frame Capture.................................................................. 224
20.Programmable Counter Array (PCA0)
................................................................ 227
20.1.PCA Counter/Timer ........................................................................................ 228
20.2.Capture/Compare Modules ............................................................................ 229
20.2.1.Edge-triggered Capture Mode................................................................ 230
20.2.2.Software Timer (Compare) Mode........................................................... 232
20.2.3.High Speed Output Mode....................................................................... 233
20.2.4.Frequency Output Mode ........................................................................ 234
20.2.5.8-Bit Pulse Width Modulator Mode......................................................... 235
20.2.6.16-Bit Pulse Width Modulator Mode....................................................... 236
20.3.Watchdog Timer Mode ................................................................................... 236
20.3.1.Watchdog Timer Operation.................................................................... 237
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