5 V Low Power

EIA RS-485 Transceiver

ADM485

Rev. F

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FEATURES

Meets EIA RS-485 standard

5 Mbps data rate

Single 5 V supply

–7 V to +12 V bus common-mode range

High speed, low power BiCMOS

Thermal shutdown protection

Short-circuit protection

Driver propagation delay: 10 ns typical

Receiver propagation delay: 15 ns typical

High-Z outputs with power off

Superior upgrade for LTC485

APPLICATIONS

Low power RS-485 systems

DTE/DCE interface

Packet switching

Local area networks (LNAs)

Data concentration

Data multiplexers

Integrated services digital network (ISDN)

FUNCTIONAL BLOCK DIAGRAM

GND

ADM485

00078-001

Figure 1.

GENERAL DESCRIPTION

The ADM485 is a differential line transceiver suitable for high

speed bidirectional data communication on multipoint bus

transmission lines. It is designed for balanced data transmission

and complies with EIA standards RS-485 and RS-422. The part

contains a differential line driver and a differential line receiver.

Both the driver and the receiver can be enabled independently.

When disabled, the outputs are three-stated.

The ADM485 operates from a single 5 V power supply.

Excessive power dissipation caused by bus contention or by

output shorting is prevented by a thermal shutdown circuit. If

during fault conditions, a significant temperature increase is

detected in the internal driver circuitry, this feature forces the

driver output into a high impedance state.

Up to 32 transceivers can be connected simultaneously on a

bus, but only one driver should be enabled at any time. It is

important, therefore, that the remaining disabled drivers do not

load the bus. To ensure this, the ADM485 driver features high

output impedance when disabled and when powered down,

which minimizes the loading effect when the transceiver is not

being used. The high impedance driver output is maintained

over the common-mode voltage range of −7 V to +12 V.

The receiver contains a fail-safe feature that results in a logic

high output state if the inputs are unconnected (floating).

The ADM485 is fabricated on BiCMOS, an advanced mixed

technology process combining low power CMOS with fast

switching bipolar technology. All inputs and outputs contain

protection against ESD; all driver outputs feature high source

and sink current capability. An epitaxial layer is used to guard

against latch-up.

The ADM485 features extremely fast switching speeds. Minimal

driver propagation delays permit transmission at data rates up

to 5 Mbps while low skew minimizes EMI interference.

The part is fully specified over the commercial and industrial

temperature range and is available in 8-lead PDIP, 8-lead SOIC,

and small footprint, 8-lead MSOP packages.

ADM485

Rev. F | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Specifications .................................................................. 4

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics ............................................. 7

Test Circuits ..................................................................................... 10

Switching Characteristics .............................................................. 11

Applications Information.............................................................. 12

Differential Data Transmission ................................................ 12

Cable and Data Rate................................................................... 12

Thermal Shutdown .................................................................... 12

Propagation Delay...................................................................... 12

Receiver Open Circuit, Fail-Safe.............................................. 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 14

REVISION HISTORY

04/08—Rev. E to Rev. F

Updated Format..................................................................Universal

Changes to Table 2............................................................................ 4

Updated Outline Dimension......................................................... 13

Changes to Ordering Guide .......................................................... 14

10/03—Rev. D to Rev. E

Changes to Timing Specifications.................................................. 2

Updated Ordering Guide................................................................. 3

7/03—Rev. C to Rev. D

Changes to Absolute Maximum Ratings ....................................... 3

Changes to Ordering Guide ............................................................ 3

Update to Outline Dimensions....................................................... 9

1/03—Rev. B to Rev. C.

Change to Specifications ..................................................................2

Change to Ordering Guide...............................................................3

12/02—Rev. A to Rev. B.

Deleted Q-8 Package ..........................................................Universal

Edits to Features.................................................................................1

Edits to General Description ...........................................................1

Edits, additions to Specifications.....................................................2

Edits, additions to Absolute Maximum Ratings............................3

Additions to Ordering Guide...........................................................3

TPCs Updated and Reformatted .....................................................5

Addition of 8-Lead MSOP Package ................................................9

Update to Outline Dimensions........................................................9

ADM485

Rev. F | Page 3 of 16

SPECIFICATIONS

= 5 V ± 5%, all specifications T

MIN

to T

MAX

, unless otherwise noted.

Table 1.

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Differential Output Voltage, V

5.0 V R = ∞, see Figure 20

2.0 5.0 V V

= 5 V, R = 50 Ω (RS-422), see Figure 20

1.5 5.0 V R = 27 Ω (RS-485), see Figure 20

OD3

1.5 5.0 V V

TST

= −7 V to +12 V, see Figure 21

Δ|V

| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 20

Common-Mode Output Voltage, V

3 V R = 27 Ω or 50 Ω, see Figure 20

Δ|V

| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω

Output Short-Circuit Current, V

OUT

= High 35 250 mA −7 V ≤ V

≤ +12 V

Output Short-Circuit Current, V

OUT

= Low 35 250 mA −7 V ≤ V

≤ +12 V

CMOS Input Logic Threshold Low, V

INL

0.8 V

CMOS Input Logic Threshold High, V

INH

2.0 V

Logic Input Current (DE, DI) ±1.0 μA

RECEIVER

Differential Input Threshold Voltage, V

−0.2 +0.2 V −7 V ≤ V

≤ +12 V

Input Voltage Hysteresis, ΔV

70 mV V

= 0 V

Input Resistance 12 kΩ −7 V ≤ V

≤ +12 V

Input Current (A, B) 1 mA V

= 12 V

–0.8 mA V

= −7 V

CMOS Input Logic Threshold Low, V

INL

0.8 V

CMOS Input Logic Threshold High, V

INH

2.0 V

Logic Enable Input Current (RE)

±1

μA

CMOS Output Voltage Low, V

0.4 V I

OUT

= 4.0 mA

CMOS Output Voltage High, V

4.0 V I

OUT

= −4.0 mA

Short-Circuit Output Current 7 85 mA V

OUT

= GND or V

Three-State Output Leakage Current ±1.0 μA 0.4 V ≤ V

OUT

≤ 2.4 V

POWER SUPPLY CURRENT

, Outputs Enabled

1.0 2.2 mA Digital inputs = GND or V

, Outputs Disabled

0.6 1 mA Digital inputs = GND or V

Part #	ADM485AR-REEL
Description	LINE TRNSCVR 1TR 1TX 1RX 8SOIC N - Tape and Reel
Category	IC
Availability	Out of Stock
Qty	0

ADM485AR-REEL

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