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8406601XA

Part # 8406601XA
Description
Category IC
Availability In Stock
Qty 31
Qty Price
1 - 2 $60.55377
3 - 6 $48.16777
7 - 12 $45.41533
13 - 18 $42.20414
19 + $37.61674
Manufacturer Available Qty
Harris Corporation
Date Code: 9900
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

10
Operating Modes
Mode 2 (Strobed Bi-Directional Bus I/O)
The functional configuration provides a means for communi-
cating with a peripheral device or structure on a single 8-bit
bus for both transmitting and receiving data (bi-directional
bus I/O). “Hand shaking” signals are provided to maintain
proper bus flow discipline similar to Mode 1. Interrupt gener-
ation and enable/disable functions are also available.
Mode 2 Basic Functional Definitions:
Used in Group A only
One 8-bit, bi-directional bus Port (Port A) and a 5-bit
control Port (Port C)
Both inputs and outputs are latched
The 5-bit control port (Port C) is used for control and
status for the 8-bit, bi-directional bus port (Port A)
Bi-Directional Bus I/O Control Signal Definition
(Figures 11, 12, 13, 14)
INTR - (Interrupt Request). A high on this output can be
used to interrupt the CPU for both input or output operations.
Output Operations
OBF - (Output Buffer Full). The OBF output will go “low” to
indicate that the CPU has written data out to port A.
ACK - (Acknowledge). A “low” on this input enables the
three-state output buffer of port A to send out the data. Oth-
erwise, the output buffer will be in the high impedance state.
INTE 1 - (The INTE flip-flop associated with
OBF). Con-
trolled by bit set/reset of PC4.
Input Operations
STB - (Strobe Input). A “low” on this input loads data into the
input latch.
IBF - (Input Buffer Full F/F). A “high” on this output indicates
that data has been loaded into the input latch.
INTE 2 - (The INTE flip-flop associated with IBF). Controlled
by bit set/reset of PC4.
FIGURE 9. MODE 1 (STROBED OUTPUT)
tWOB
tWB
tAK tAIT
tAOB
tWIT
OBF
WR
INTR
ACK
OUTPUT
Combinations of Mode 1: Port A and Port B can be individually defined as input or output in Mode 1 to support a wide variety of strobed I/O
applications.
FIGURE 10. COMBINATIONS OF MODE 1
1
D7
0
D6
1
D5
1
D4
1/0
D3
D2 D1 D0
CONTROL WORD
PORT A - (STROBED INPUT)
PC4
8
OBFB
PA7-PA0
STBA
INTRB
PC0
PC6, PC7
2
WR
PC6, PC7
1 = INPUT
0 = OUTPUT
PORT B - (STROBED OUTPUT)
8
IIBFA
PC5
INTRA
PC3
ACKB
PC2
I/O
PC1
PB7, PB0
RD
10 1
D7
0
D6
1
D5
0
D4
1/0
D3
D2 D1 D0
CONTROL WORD
PORT A - (STROBED OUTPUT)
PC7
8
STBB
PA7-PA0
OBFA
INTRB
PC0
PC4, PC5
2
RD
PC4, PC5
1 = INPUT
0 = OUTPUT
PORT B - (STROBED INPUT)
8
ACKA
PC6
INTRA
PC3
IBFB
PC1
I/O
PC2
PB7, PB0
WR
11
82C55A
11
FIGURE 11. MODE CONTROL WORD FIGURE 12. MODE 2
NOTE: Any sequence where WR occurs before ACK and STB occurs before RD is permissible. (INTR = IBF MASK STB RD ÷ OBF
MASK ACK WR)
FIGURE 13. MODE 2 (BI-DIRECTIONAL)
1
D7
D6 D5 D4 D3 D2 D1 D0
CONTROL WORD
1/0 1/01 1/0
PC2-PC0
1 = INPUT
0 = OUTPUT
PORT B
1 = INPUT
0 = OUTPUT
GROUP B MODE
0 = MODE 0
1 = MODE 1
PC7
OBFA
PC6
INTE
PA7-PA0
ACKA
IBFA
PC4
WR
INTE
RD
PC3
PC5
PC2-PC0
1
2
8
STBA
3
I/O
INTRA
tWOB
tAOB
tAK
tAD
tKD
tPH
tPS
tSIB
tST
OBF
WR
INTR
ACK
IBF
STB
PERIPHERAL
BUS
RD
tRIB
DATA FROM
PERIPHERAL TO 82C55A
DATA FROM
82C55A TO PERIPHERAL
DATA FROM
82C55A TO CPU
DATA FROM
CPU TO 82C55A
82C55A
12
MODE 2 AND MODE 0 (INPUT) MODE 2 AND MODE 0 (OUTPUT)
MODE 2 AND MODE 1 (OUTPUT) MODE 2 AND MODE 1 (INPUT)
FIGURE 14. MODE 2 COMBINATIONS
1
D7
1
D6
D5 D4 D3 D2 D1 D0
CONTROL WORD
PC7
8
STBA
PA7-PA0
OBFA
IBFA
PC5
PC2-PC0
3
RD
PC2-PC0
1 = INPUT
0 = OUTPUT
ACKA
PC6
INTRA
PC3
I/O
PC4
PB7-PB0
01
1/0
8
WR
1
D7
1
D6
D5 D4 D3 D2 D1 D0
CONTROL WORD
PC7
8
STBA
PA7-PA0
OBFA
IBFA
PC5
PC2-PC0
3
RD
PC2-PC0
1 = INPUT
0 = OUTPUT
ACKA
PC6
INTRA
PC3
I/O
PC4
PB7, PB0
00
1/0
8
WR
1
D7
1
D6
D5 D4 D3 D2 D1 D0
CONTROL WORD
PC7
8
STBA
PA7-PA0
OBFA
IBFA
PC5
RD
ACKA
PC6
INTRA
PC3
PC4
PB7-PB0
10
8
WR
PC1
OBFB
ACKB
PC2
PC0
INTRB
1
D7
1
D6
D5 D4 D3 D2 D1 D0
CONTROL WORD
PC7
8
STBA
PA7-PA0
OBFA
IBFA
PC5
RD
ACKA
PC6
INTRA
PC3
PC4
PB7-PB0
11
8
WR
PC2
STBB
PC1
PC0
INTRB
IBFB
82C55A
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