C8051F85x/86x
Preliminary Rev 0.6 13
Electrical Specifications
Offset Error E
OFF
12 Bit Mode, VREF = 1.65 V –2 0 2 LSB
10 Bit Mode, VREF = 1.65 V –1 0 1 LSB
Offset Temperature Coeffi-
cient
TC
OFF
— 0.004 — LSB/°C
Slope Error E
M
12 Bit Mode –0.07 –0.02 0.02 %
Dynamic Performance 10 kHz Sine Wave Input 1dB below full scale, Max
throughput, using AGND pin
Signal-to-Noise SNR 12 Bit Mode TBD 66 — dB
10 Bit Mode TBD 60 — dB
Signal-to-Noise Plus Distor-
tion
SNDR 12 Bit Mode TBD 66 — dB
10 Bit Mode TBD 60 — dB
Total Harmonic Distortion
(Up to 5th Har
m
onic)
THD 12 Bit Mode — 71 — dB
10 Bit Mode — 70 — dB
Spurious-Free Dynamic
Rang
e
SFDR 12
Bit Mode — –79 — dB
10 Bit Mode — –74 — dB
Table 1.7. ADC (Continued)
Parameter Symbol Test Condition Min Typ Max Unit
*Note: Absolute input pin voltage is limited by the V
DD
supply.
