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1N256

Part # 1N256
Description
Category DIODE
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Qty 8
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1 + $2.42358
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Military Spec
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

4.1 Thermal handling ratings
Symbol Description Min. Max. Unit Notes
T
STG
Storage temperature –55 150 °C 1
T
SDR
Solder temperature, lead-free — 260 °C 2
Solder temperature, leaded — 245
1. Determined according to JEDEC Standard JESD22-A103, High Temperature Storage Life.
2. Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
4.2 Moisture handling ratings
Symbol Description Min. Max. Unit Notes
MSL Moisture sensitivity level — 3 — 1
1. Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
4.3 ESD handling ratings
Symbol Description Min. Max. Unit Notes
V
HBM
Electrostatic discharge voltage, human body model -2000 +2000 V 1
V
CDM
Electrostatic discharge voltage, charged-device model -500 +500 V 2
I
LAT
Latch-up current at ambient temperature of 85°C -100 +100 mA
1. Determined according to JEDEC Standard JESD22-A114, Electrostatic Discharge (ESD) Sensitivity Testing Human Body
Model (HBM).
2. Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.
4.4 Voltage and current operating ratings
Symbol Description Min. Max. Unit
V
DD
Digital supply voltage –0.3 3.8 V
I
DD
Digital supply current — 185 mA
V
DIO
Digital input voltage (except RESET, EXTAL, and XTAL) –0.3 5.5 V
Table continues on the next page...
Ratings
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
10
Preliminary
Freescale Semiconductor, Inc.
Symbol Description Min. Max. Unit
V
AIO
Analog, RESET, EXTAL, and XTAL input voltage –0.3 V
DD
+ 0.3 V
I
D
Instantaneous maximum current single pin limit (applies to all
port pins)
–25 25 mA
V
DDA
Analog supply voltage V
DD
– 0.3 V
DD
+ 0.3 V
V
USB_DP
USB_DP input voltage –0.3 3.63 V
V
USB_DM
USB_DM input voltage –0.3 3.63 V
VREGIN USB regulator input –0.3 6.0 V
V
BAT
RTC battery supply voltage –0.3 3.8 V
5 General
5.1 Nonswitching electrical specifications
5.1.1 Voltage and current operating requirements
Table 1. Voltage and current operating requirements
Symbol Description Min. Max. Unit Notes
V
DD
Supply voltage 1.71 3.6 V
V
DDA
Analog supply voltage 1.71 3.6 V
V
DD
– V
DDA
V
DD
-to-V
DDA
differential voltage –0.1 0.1 V
V
SS
– V
SSA
V
SS
-to-V
SSA
differential voltage –0.1 0.1 V
V
BAT
RTC battery supply voltage 1.71 3.6 V
V
IH
Input high voltage
• 2.7 V ≤ V
DD
≤ 3.6 V
• 1.7 V ≤ V
DD
≤ 2.7 V
0.7 × V
DD
0.75 × V
DD
—
—
V
V
V
IL
Input low voltage
• 2.7 V ≤ V
DD
≤ 3.6 V
• 1.7 V ≤ V
DD
≤ 2.7 V
—
—
0.35 × V
DD
0.3 × V
DD
V
V
V
HYS
Input hysteresis 0.06 × V
DD
— V
Table continues on the next page...
General
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
11
Table 1. Voltage and current operating requirements (continued)
Symbol Description Min. Max. Unit Notes
I
IC
DC injection current — single pin
• V
IN
< V
SS
0
–0.2
mA
1
DC injection current — total MCU limit, includes sum
of all stressed pins
• V
IN
< V
SS
0
–5
mA
1
V
RAM
V
DD
voltage required to retain RAM 1.2 — V
V
RFVBAT
V
BAT
voltage required to retain the VBAT register file TBD — V
1. All functional non-supply pins are internally clamped to V
SS
, and induce an injection current when V
IN
is less than V
SS
. The
I
IC
maximum operating requirement should not be exceeded. If this requirement cannot be met, the input must be current
limited to the value specified.
5.1.2 LVD and POR operating requirements
Table 2. V
DD
supply LVD and POR operating requirements
Symbol Description Min. Typ. Max. Unit Notes
V
POR
Falling VDD POR detect voltage TBD 1.1 TBD V
V
LVDH
Falling low-voltage detect threshold — high
range (LVDV=01)
TBD 2.56 TBD V
V
LVW1H
V
LVW2H
V
LVW3H
V
LVW4H
Low-voltage warning thresholds — high range
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
TBD
TBD
TBD
TBD
2.70
2.80
2.90
3.00
TBD
TBD
TBD
TBD
V
V
V
V
1
V
HYSH
Low-voltage inhibit reset/recover hysteresis —
high range
60 mV
V
LVDL
Falling low-voltage detect threshold — low range
(LVDV=00)
TBD 1.60 TBD V
V
LVW1L
V
LVW2L
V
LVW3L
V
LVW4L
Low-voltage warning thresholds — low range
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
TBD
TBD
TBD
TBD
1.80
1.90
2.00
2.10
TBD
TBD
TBD
TBD
V
V
V
V
1
V
HYSL
Low-voltage inhibit reset/recover hysteresis —
low range
40 mV
V
BG
Bandgap voltage reference TBD 1.00 TBD V
t
LPO
Internal low power oscillator period
factory trimmed
TBD 1000 TBD μs
General
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
12
Preliminary
Freescale Semiconductor, Inc.
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