Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

4282

Part # 4282
Description MULTI COUPLING RING
Category COAX CONNECTOR
Availability In Stock
Qty 4
Qty Price
1 - 2 $12.30393
3 + $9.32116
Manufacturer Available Qty
POMONA ELECTRONICS
Date Code: 0110
  • Shipping Freelance Stock: 1
    Ships Immediately
POMONA ELECTRONICS
  • Shipping Freelance Stock: 2
    Ships Immediately
POMONA ELECTRONICS
  • Shipping Freelance Stock: 1
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

ROM type
Mask ROM
Mask ROM
One Time PROM
Package
20P2E/F-A
20P2E/F-A
20P2E/F-A
RAM size
(× 4 bits)
48 words
64 words
64 words
PIN CONFIGURATION (TOP VIEW)
ROM (PROM) size
(× 9 bits)
1024 words
2048 words
2048 words
Part number
M34282M1-XXXGP
M34282M2-XXXGP
M34282E2GP
DESCRIPTION
The 4282 Group enables fabrication of 8 × 7 key matrix and has
the followin timers;
• an 8-bit timer which can be used to set each carrier wave and
has two reload register
• an 8-bit timer which can be used to auto-control and has a
reload register.
FEATURES
Number of basic instructions ............................................. 68
Minimum instruction execution time ............................ 8.0
µ
s
(at f(X
IN) = 4.0 MHz, system clock = f(XIN)/8)
Supply voltage ................................................. 1.8 V to 3.6 V
Subroutine nesting ..................................................... 4 levels
Timer
Timer 1 ................................................................... 8-bit timer
(This has a reload register and carrier wave output auto-control
function)
Timer 2 ................................................................... 8-bit timer
(This has two reload registers and carrier wave output function)
Logic operation function (XOR, OR, AND)
RAM back-up function
Key-on wakeup function (ports D
4–D7, E0–E2, G0–G3) .... 11
I/O port (ports D, E, G, CARR) .......................................... 16
Oscillation circuit ..................................... Ceramic resonance
Watchdog timer
Power-on reset circuit
Voltage drop detection circuit ......................... Typical:1.50 V
(system reset)
APPLICATION
Various remote control transmitters
V
S
S
2
3
4
5
6
7
8
9
1
0
1
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
2
0
D7
D2
D3
D4
D5
D1
D0
C
A
R
R
V
D
D
D6
G3
G2
X
I
N
X
O
U
T
G0
G1
M
3
4
2
8
2
M
x
-
X
X
X
G
P
Outline 20P2E/F-A
4282 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
REJ03B0084-0133Z
Rev.1.33
2004.03.18
Rev.1.33 Mar 18, 2004 page 1 of 67
Rev.1.33 Mar 18, 2004 page 2 of 67
4282 Group
BLOCK DIAGRAM
R
A
M
(
4
8
,
6
4
w
o
r
d
s
4
b
i
t
s
)
R
O
M
(
1
0
2
4
,
2
0
4
8
w
o
r
d
s
9
b
i
t
s
)
7
2
0
s
e
r
i
e
s
C
P
U
c
o
r
e
M
e
m
o
r
y
I
/
O
p
o
r
t
I
n
t
e
r
n
a
l
p
e
r
i
p
h
e
r
a
l
f
u
n
c
t
i
o
n
T
i
m
e
r
/
R
e
m
o
t
e
-
c
o
n
t
r
o
l
c
a
r
r
i
e
r
-
w
a
v
e
o
u
t
p
u
t
T
i
m
e
r
1
(
8
b
i
t
s
,
c
a
r
r
i
e
r
w
a
v
e
o
u
t
p
u
t
c
o
n
t
r
o
l
)
T
i
m
e
r
2
(
8
b
i
t
s
,
c
a
r
r
i
e
r
w
a
v
e
g
e
n
e
r
a
t
i
o
n
)
S
y
s
t
e
m
c
l
o
c
k
g
e
n
e
r
a
t
i
o
n
c
i
r
c
u
i
t
X
I
N
-
X
O
U
T
(
N
o
t
e
)
R
e
g
i
s
t
e
r
B
(
4
b
i
t
s
)
R
e
g
i
s
t
e
r
A
(
4
b
i
t
s
)
R
e
g
i
s
t
e
r
D
(
3
b
i
t
s
)
R
e
g
i
s
t
e
r
E
(
8
b
i
t
s
)
S
t
a
c
k
r
e
g
i
s
t
e
r
S
K
(
4
l
e
v
e
l
s
)
A
L
U
(
4
b
i
t
s
)
P
o
r
t
D
4
P
o
r
t
G
4
P
o
r
t
E
2
4
1
W
a
t
c
h
d
o
g
t
i
m
e
r
(
1
4
b
i
t
s
)
R
e
s
e
t
(
v
o
l
t
a
g
e
d
r
o
p
d
e
t
e
c
t
i
o
n
c
i
r
c
u
i
t
)
N
o
t
e
:
P
R
O
M
2
0
4
8
w
o
r
d
s
9
b
i
t
s
,
R
A
M
6
4
w
o
r
d
s
4
b
i
t
s
f
o
r
b
u
i
l
t
-
i
n
P
R
O
M
v
e
r
s
i
o
n
.
Rev.1.33 Mar 18, 2004 page 3 of 67
4282 Group
PERFORMANCE OVERVIEW
Function
68
8.0
µ
s (f(XIN) = 4.0 MHz, system clock = f(XIN)/8, VDD = 3 V)
2048 words 9 bits
1024 words 9 bits
64 words 4 bits
48 words 4 bits
Four independent output ports
Four independent I/O ports with the pull-down function
3-bit input port with the pull-down function
2-bit output port (E
0, E1)
4-bit I/O port with the pull-down function
1-bit output port; CMOS output
8-bit timer with a reload register
8-bit timer with two reload registers
4 levels (However, only 3 levels can be used when the TABP p instruction is executed)
CMOS silicon gate
20-pin plastic molded SSOP (20P2E/F-A)
–20 °C to 85 °C
1.8 V to 3.6 V
400 µA
(f(X
IN) = 4.0 MHz, system clock = f(XIN)/8, VDD = 3 V)
0.1
µ
A (at room temperature, VDD = 3 V)
Parameter
Number of basic instructions
Minimum instruction execution time
Memory sizes
Input/Output
ports
Timer
Subroutine nesting
Device structure
Package
Operating temperature range
Supply voltage
Power
dissipation
(typical value)
ROM
RAM
D
0–D3
D4–D7
E0–E2
E0, E1
G0–G3
CARR
Timer 1
Timer 2
Active mode
RAM back-up mode
M34282M2/E2
M34282M1
M34282M2/E2
M34282M1
Output
I/O
Input
Output
I/O
Output
PIN DESCRIPTION
Name
Power supply
Ground
System clock input
System clock output
Output port D
I/O port D
I/O port E
I/O port G
Carrier wave output
for remote control
Input/Output
Input
Output
Output
I/O
Output
Input
I/O
Output
Function
Connected to a plus power supply.
Connected to a 0 V power supply.
I/O pins of the system clock generating circuit. Connect a ceramic resonator
between pins X
IN and XOUT. The feedback resistor is built-in between pins XIN
and XOUT.
Each pin of port D has an independent 1-bit wide output function. The output
structure is P-channel open-drain.
1-bit I/O port. For input use, set the latch of the specified bit to “0.” When the built-
in pull-down transistor is turned on, the key-on wakeup function using “H” level
sense and the pull-down transistor become valid. The output structure is P-channel
open-drain.
2-bit (E
0, E1) output port. The output structure is P-channel open-drain.
3-bit input port. For input use (E
0, E1), set the latch of the specified bit to “0.”
When the built-in pull-down transistor is turned on, the key-on wakeup function
using “H” level sense and the pull-down transistor become valid. Port E
2 has an
input-only port and has a key-on wakeup function using “H” level sense and pull-
down transistor.
4-bit I/O port. For input use, set the latch of the specified bit to “0.” The output structure
is P-channel open-drain. When the built-in pull-down transistor is turned on, the key-
on wakeup function using “H” level sense and pull-down transistor become valid.
Carrier wave output pin for remote control. The output structure is CMOS circuit.
Pin
V
DD
VSS
XIN
XOUT
D0–D3
D4–D7
E0–E2
G0–G3
CARR
1234567NEXT