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GRM32ER60J107ME20L

Part # GRM32ER60J107ME20L
Description CAP 100UF 6.3VDC X5R 20% SMD1210 - Cut TR (SOS)
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

I
TEXAS
NSTRUMENTS
Load
+
-
A1
V1
DC
Source
VIN
-
+
FAN
V2
V3
V4
V5
DC
Source
V5IN
-
+
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Test Setup
4.2 Recommended Test Setup
Figure 3. TPS51916EVM-746 Recommended Test Setup
Figure 3 is the recommended test setup to evaluate the TPS51916EVM-746. When working at an ESD
workstation, ensure that any wrist straps, bootstraps, or mats are connected referencing the user to earth
ground before power is applied to the EVM.
Input Connections:
1. Prior to connecting the dc source V5IN, it is advisable to limit the source current from V5IN to 1 A
maximum. Ensure that V5IN is initially set to 0 V and connected as shown in Figure 3.
2. Prior to connecting the dc source VIN, it is advisable to limit the source current from VIN to 10 A
maximum. Ensure that VIN is initially set to 0 V and connected as shown in Figure 3.
3. Connect voltmeters V1 at TP2 (V5IN) and TP3 (GND) to measure V5IN voltage, V2 at TP5 (VIN), and
TP8 (GND) to measure VIN voltage as shown in Figure 3.
4. Connect a current meter A1 between dc source VIN and J2 to measure the input current.
5. Connect a current meter A2 between dc source V5IN and J1 to measure the input current.
Output Connections:
7
SLUU526August 2011 Using the TPS51916EVM-746 Complete DDR2, DDR3, DDR3L, and DDR4
Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered
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Reference
Configurations
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1. Connect the load to J5 and set the load to constant-resistance mode to sink 0 Adc before V5IN and
VIN are applied.
2. Connect a voltmeter V3 at TP11 (VDDQ) and TP14 (GND) to measure VDDQ voltage, V4 at TP12
(VTT) and TP13 (GND) to measure VTT voltage and V5 at TP17 (VTTREF) and TP18 (GND) to
measure VTTREF voltage.
Other Connections:
Place a fan as shown in Figure 3 and turn it on, ensuring that air is flowing across the EVM.
5 Configurations
5.1 S3, S5 Enable Selection
The controller can be enabled and disabled by switches SW1 and SW2.
Default setting: Push SW1 and SW2 to the bottom (OFF position) to disable the controller.
Table 2. S3, S5 Enable Selection
State SW2 (S3) set to SW1(S5) set to VDDQ VTTREF VTT
S0 ON position ON position ON ON ON
S3 OFF position ON position ON ON OFF(High-Z)
S4/S5 OFF position OFF position OFF(Discharge) OFF(Discharge) OFF(Discharge)
6 Test Procedure
6.1 Line/Load Regulation and Efficiency Measurement Procedure
1. Set up EVM as described in Section 4 and Figure 3.
2. Ensure that the load is set to constant-resistance mode and to sink 0 Adc.
3. Ensure that SW1 and SW2 are in the OFF position.
4. Increase V5IN from 0 V to 5 V. Use V1 to measure V5IN input voltage.
5. Increase VIN from 0 V to 12 V. Use V2 to measure VIN input voltage.
6. Push SW1 and SW2 to ON position to enable the controller.
7. Use V3 to measure VDDQ output voltage.
8. Use V4 to measure VTT output voltage.
9. Use V5 to measure VTTREF output voltage.
10. Use A1 to measure VIN input current for efficiency.
11. Use A2 to measure V5IN input current for efficiency.
12. Vary the load from 0 Adc to 20 Adc; VDDQ must remain in load regulation.
13. Vary VIN from 8 V to 20 V; VDDQ must remain in line regulation.
14. Push SW1 and SW2 to OFF position to disable the controller.
15. Decrease the load to 0 A.
16. Decrease VIN and V5IN to 0 V.
6.2 List of Test Points
Table 3. Test Point Functions
Test Points Name Description
TP1 PGOOD Power Good
TP2 V5IN 5-V input
TP3 GND Ground
8
Using the TPS51916EVM-746 Complete DDR2, DDR3, DDR3L, and DDR4 SLUU526 August 2011
Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered
Submit Documentation Feedback
Reference
Copyright © 2011, Texas Instruments Incorporated
0.001 0.01 0.1 1 10 100
I - Output Current - A
O
12 Vin
20 Vin
8 Vin
0
10
20
30
40
50
60
70
80
90
100
Efficiency - %
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Performance Data and Typical Characteristic Curves
Table 3. Test Point Functions (continued)
Test Points Name Description
TP4 S3 S3 signal input
TP5 VIN VIN input
TP6 VLDOIN_EXT External input for VLDOIN
TP7 S5 S5 signal input
TP8 GND Ground
TP9 GND Ground
TP10 SW Switching node
TP11 VDDQ VDDQ output
TP12 VTT VTT output
TP13 GND Ground
TP14 GND Ground
TP15 VREF Internal 1.8-V reference voltage
TP16 GND Ground
TP17 VTTREF Buffered VTT reference voltage
TP18 GND Ground
6.3 Equipment Shutdown
1. Shut down the load.
2. Shut down V5IN and VIN.
3. Shut down the fan.
7 Performance Data and Typical Characteristic Curves
Figure 4 through Figure 22 present typical performance curves for TPS51916EVM-746.
7.1 DDR3 VDDQ Efficiency
Figure 4. DDR3 VDDQ Efficiency
9
SLUU526August 2011 Using the TPS51916EVM-746 Complete DDR2, DDR3, DDR3L, and DDR4
Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Reference
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