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SN74CBT3257PW

Part # SN74CBT3257PW
Description 2:1 MULTIPLEXER/DATA SELECTORCMOS, 16PIN TSSOP
Category IC
Availability Out of Stock
Qty 0
Qty Price
1 + $0.33090



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.


   
SCDS017M − MAY 1995 − REVISED JANUARY 2004
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D 5- Switch Connection Between Two Ports D TTL-Compatible Input Levels
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S
1B1
1B2
1A
2B1
2B2
2A
GND
V
CC
OE
4B1
4B2
4A
3B1
3B2
3A
D, DB, DBQ, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
116
89
2
3
4
5
6
7
15
14
13
12
11
10
OE
4B1
4B2
4A
3B1
3B2
1B1
1B2
1A
2B1
2B2
2A
S
3A
V
GND
CC
description/ordering information
The SN74CBT3257 is a 4-bit 1-of-2 high-speed TTL-compatible FET multiplexer/demultiplexer. The low
on-state resistance of the switch allows connections to be made with minimal propagation delay.
Output-enable (OE
) and select-control (S) inputs select the appropriate B1 and B2 outputs for the A-input data.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY Tape and reel SN74CBT3257RGYR CU257
SOIC − D
Tube SN74CBT3257D
CBT3257
SOIC − D
Tape and reel SN74CBT3257DR
CBT3257
−40°C to 85°C
SSOP − DB Tape and reel SN74CBT3257DBR CU257
−40 C to 85 C
SSOP (QSOP) − DBQ Tape and reel SN74CBT3257DBQR CU257
TSSOP − PW
Tube SN74CBT3257PW
CU257
TSSOP − PW
Tape and reel SN74CBT3257PWR
CU257
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
FUNCTION
OE S
FUNCTION
L L A port = B1 port
L H A port = B2 port
H X Disconnect
Copyright 2004, Texas Instruments Incorporated
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"&#"0  !)) '!!&"&#+
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

   
SCDS017M − MAY 1995 − REVISED JANUARY 2004
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagram (positive logic)
1A
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
OE
S
3A
2A
4A
4
7
9
12
2
3
5
6
11
10
14
13
15
1

   
SCDS017M − MAY 1995 − REVISED JANUARY 2004
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
−0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
K
(V
I/O
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DB package 82°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DBQ package 90°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): RGY package 39°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
MIN MAX UNIT
V
CC
Supply voltage 4 5.5 V
V
IH
High-level control input voltage 2 V
V
IL
Low-level control input voltage 0.8 V
T
A
Operating free-air temperature −40 85 °C
NOTE 4: All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
MAX UNIT
V
IK
V
CC
= 4.5 V, I
I
= −18 mA −1.2 V
I
I
V
CC
= 5.5 V, V
I
= 5.5 V or GND ±1 µA
I
CC
V
CC
= 5.5 V, I
O
= 0, V
I
= V
CC
or GND 3 µA
I
CC
§
Control inputs V
CC
= 5.5 V, One input at 3.4 V, Other inputs at V
CC
or GND 2.5 mA
C
i
Control inputs V
I
= 3 V or 0 3.5 pF
C
io(OFF)
A port
V
O
= 3 V or 0,
6.5
pF
C
io(OFF)
B port
V
O
= 3 V or 0,
OE = V
CC
4
pF
V
CC
= 4 V,
TYP at V
CC
= 4 V
V
I
= 2.4 V, I
I
= 15 mA 14 20
r
on
V
I
= 0
I
I
= 64 mA 5 7
r
on
V
CC
= 4.5 V
V
I
= 0
I
I
= 30 mA 5 7
V
CC
= 4.5 V
V
I
= 2.4 V, I
I
= 15 mA 10 15
All typical values are at V
CC
= 5 V (unless otherwise noted), T
A
= 25°C.
§
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
CC
or GND.
Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined
by the lowest voltage of the two (A or B) terminals.
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