Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

AT24HC02BN-SH-B

Part # AT24HC02BN-SH-B
Description EEPROM SERL-2WIRE 2KBIT 256X82.5V/3.3V/5V 8SOIC - Rail/Tu
Category IC
Availability Out of Stock
Qty 0
Qty Price
1 + $0.09900



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1. Features
Write Protect Pin for Hardware Data Protection
Utilizes Different Array Protection Compared to the AT24C02B
Low-voltage and Standard-voltage Operation
1.8 (V
CC
= 1.8V to 5.5V)
Internally Organized 256 x 8 (2K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V) and 400 kHz (1.8V, 2.5V, 2.7V) Clock Rate
8-byte Page
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms Max)
High Reliability
Endurance: One Million Write Cycles
Data Retention: 100 Years
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
2. Description
The AT24HC02B provides 2048 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The AT24HC02B is available in space-saving
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a
two-wire serial interface. In addition, the entire family is available in 1.8V (1.8V to
5.5V) version.
Table 2-1. Pin Configuration
Pin Name Function
A0–A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
Two-wire Serial
EEPROM
2K (256 x 8)
AT24HC02B
Rev. 5134E–SEEPR–3/08
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead PDIP
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead SOIC
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead TSSOP
2
5134E–SEEPR–3/08
AT24HC02B
Figure 2-1. Block Diagram
Absolute Maximum Ratings*
Operating Temperature......................................55°C to +125°C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature .........................................−65°C to +150°C
Voltage on Any Pin
with Respect to Ground ........................................ 1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
STA RT
STOP
LOGIC
VCC
GND
WP
SCL
SDA
A
2
A
1
A
0
SERIAL
CONTROL
LOGIC
EN
H.V. PUMP/TIMING
EEPROM
DATA RECOVERY
SERIAL MUX
X DEC
D
OUT
/ACK
LOGIC
COMP
LOAD
INC
DATA WORD
ADDR/COUNTER
Y DEC
R/W
D
OUT
D
IN
LOAD
DEVICE
ADDRESS
COMPARATOR
3
5134E–SEEPR–3/08
AT24HC02B
3. Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-
drain driven and may be wire-ORed with any number of other open-drain or open collector
devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs
that must be hardwired for the AT24HC02B. As many as eight 2K devices may be addressed on
a single bus system. (Device addressing is discussed in detail under Device Addressing, page
8).
WRITE PROTECT (WP): The AT24HC02B has a WP pin that provides hardware data protec-
tion. The WP pin allows normal read/write operations when connected to ground (GND). When
the WP pin is connected to V
CC
, the write protection feature is enabled and operates as shown.
Table 3-1. Write Protect
WP Pin Status
Part of the Array Protected
24HC02B
At V
CC
Upper Half (1K) Array
At GND Normal Read/Write Operations
1234567NEXT