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CY74FCT191ATSOC

Part # CY74FCT191ATSOC
Description Counter Single 4-Bit Async Binary UP/Down 16-Pin SOIC Tube
Category IC
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Date Code: 9435
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

4-Bit Up/Down Binary Counter
CY74FCT191T
SCCS016 - May 1994 - Revised February 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright © 2000, Texas Instruments Incorporated
Features
Function, pinout, and drive compatible with FCT and F
logic
FCT-C speed at 6.2 ns max,
FCT-A speed at 7.8 ns max.
Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable permits live insertion
ESD > 2000V
Matched rise and fall times
Sink current 64 mA
Source current 32 mA
Functional Description
The FCT191T is a reversible modulo-16 binary counter,
featuring synchronous counting and asynchronous presetting.
The preset allows the FCT191T to be used in programmable
dividers. The count enable input, terminal count output, and ripple
clock output make possible a variety of methods of implementing
multiusage counters. In the counting modes, state changes are
initiated by the rising edge of the clock.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
CP
RC Q
0
J
Q
CLOCK
PRESET
K
CLEAR
Q
J
Q
CLOCK
PRESET
K
CLEAR
Q
J
Q
CLOCK
PRESET
K
CLEAR
Q
J
Q
CLOCK
PRESET
K
CLEAR
Q
Q
1
Q
2
Q
3
TC
CEP
0
P
1
P
2
P
3
PLU/D
Pin Configurations
1
2
3
4
5
6
7
8
Q
1
Q
0
CE
U/D
Q
2
Q
3
V
CC
GND
Top View
SOIC/QSOP
16
15
14
13
12
11
10
9
P
1
PL
P
2
P
3
P
0
CP
RC
TC
Pin Description
Name Description
CE Count Enable Input (Active LOW)
CP Clock Pulse Input (Active Rising Edge)
P Parallel Data Inputs
PL Asynchronous Parallel Load Input (Active LOW)
U/D Up/Down Count Control Input
Q Flip-Flop Outputs
RC Ripple Clock Output (Active LOW)
TC Terminal Count Output
RC Function Table
[1]
Inputs Outputs
CE CP T
[2]
RC
L
H
X
X
X
H
X
L
H
H
CY74FCT191T
2
Maximum Ratings
[3, 4]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied............................................. –65°C to +135°C
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage ........................................... –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Notes:
1. H = HIGH Voltage Level, L = LOW Voltage Level, X = Don‘t Care,
= LOW-to-HIGH clock transition. =Low Pulse.
2. TC is generated internally.
Mode Select
[1]
Inputs
PL CE U/D CP Mode
H
H
L
H
L
L
X
H
L
H
X
X
X
X
Count Up
Count Down
Preset (Asynchronous)
No Change (Hold)
RC Function Table
[1]
Inputs Outputs
CE CP T
[2]
RC
Operating Range
Range
Ambient
Temperature V
CC
Commercial –40°C to +85°C 5V ± 5%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
[5]
Max. Unit
V
OH
Output HIGH Voltage V
CC
=Min., I
OH
=–32 mA 2.0 V
V
CC
=Min., I
OH
=–15 mA 2.4 3.3 V
V
OL
Output LOW Voltage V
CC
=Min., I
OL
=64 mA 0.3 0.55 V
V
IH
Input HIGH Voltage 2.0 V
V
IL
Input LOW Voltage 0.8 V
V
H
Hysteresis
[6]
All inputs 0.2 V
V
IK
Input Clamp Diode Voltage V
CC
=Min., I
IN
=–18 mA –0.7 –1.2 V
I
I
Input HIGH Current V
CC
=Max., V
IN
=V
CC
5 µA
I
IH
Input HIGH Current V
CC
=Max., V
IN
=2.7V ±1 µA
I
IL
Input LOW Current V
CC
=Max., V
IN
=0.5V ±1 µA
I
OS
Output Short Circuit Current
[7]
V
CC
=Max., V
OUT
=0.0V –60 –120 –225 mA
I
OFF
Power-Off Disable V
CC
=0V, V
OUT
=4.5V ±1 µA
Capacitance
[6]
Parameter Description Typ.
[5]
Max. Unit
C
IN
Input Capacitance 5 10 pF
C
OUT
Output Capacitance 9 12 pF
Notes:
3. Unless otherwise noted, these limits are over the operating free-air temperature range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
5. Typical values are at V
CC
=5.0V, T
A
=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I
OS
tests should be performed last.
CY74FCT191T
3
Power Supply Characteristics
Parameter Description Test Conditions Typ.
[5]
Max. Unit
I
CC
Quiescent Power Supply Current V
CC
=Max., V
IN
< 0.2V,
V
IN
> V
CC
–0.2V
0.1 0.2 mA
I
CC
Quiescent Power Supply Current
(TTL inputs HIGH)
V
CC
=Max., V
IN
=3.4V,
[8]
f
1
=0, Outputs Open
0.5 2.0 mA
I
CCD
Dynamic Power Supply Current
[9]
V
CC
=Max., One Bit Toggling, Preset Mode,
50% Duty Cycle, Outputs Open,
MR=V
CC
=SR,
PL=CE=U/D=CP=GND,
V
IN
< 0.2V or V
IN
> V
CC
–0.2V
0.06 0.12 mA/MHz
I
C
Total Power Supply Current
[10]
V
CC
=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f
1
=5 MHz,
PL=CE=U/D=CP=GND,
V
IN
=V
CC
,V
IN
=GND
0.4 0.8 mA
V
CC
=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f
1
=5 MHz,
V
IN
=3.4V or V
IN
=GND
0.7 1.8 mA
V
CC
=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
Four Bits Toggling at f
1
=5 MHz,
PL=CE=U/D=CP=GND,
V
IN
=V
CC
,V
IN
=GND
1.3 2.6
[11]
mA
V
CC
=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
Four Bits Toggling at f
1
=5 MHz,
PL=CE=U/D=CP=GND,
V
IN
=3.4V or V
IN
=GND
2.3 6.6
[11]
mA
Notes:
8. Per TTL driven input (V
IN
=3.4V); all other inputs at V
CC
or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
=I
CC
+I
CC
D
H
N
T
+I
CCD
(f
0
/2 + f
1
N
1
)
I
CC
= Quiescent Current with CMOS input levels
I
CC
= Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
D
H
= Duty Cycle for TTL inputs HIGH
N
T
= Number of TTL inputs at D
H
I
CCD
= Dynamic Current caused by an input transition pair
(HLH or LHL)
f
0
= Clock frequency for registered devices, otherwise zero
f
1
= Input signal frequency
N
1
= Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the I
CC
formula. These limits are specified but not tested.
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