Name: SN74LVC2GU04YEAR
SKU: SN74LVC2GU04YEAR
Price: 0.26405 USD
Availability: InStock

SN74LVC2GU04

DUAL INVERTER GATE

SCES197J – APRIL 1999 – REVISED FEBRUARY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Available in the Texas Instruments

NanoStar and NanoFree Packages

Supports 5-V V

Operation

Inputs Accept Voltages to 5.5 V

Max t

of 3.7 ns at 3.3 V

Low Power Consumption, 10-µA Max I

±24-mA Output Drive at 3.3 V

Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25°C

Typical V

OHV

(Output V

Undershoot)

>2 V at V

= 3.3 V, T

= 25°C

Unbuffered Outputs

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

description/ordering information

This dual inverter is designed for 1.65-V to 5.5-V V

operation.

The SN74LVC2GU04 contains two inverters with unbuffered outputs and performs the Boolean function Y = A

NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

‡

NanoStar – WCSP (DSBGA)

0.17-mm Small Bump – YEA

SN74LVC2GU04YEAR

NanoFree – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free)

Reel of 3000

SN74LVC2GU04YZAR

NanoStar – WCSP (DSBGA)

0.23-mm Large Bump – YEP

Reel

3000

SN74LVC2GU04YEPR

_ _ _

–40°C to 85°C

NanoFree – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SN74LVC2GU04YZPR

SOT (SOT 23) DBV

Reel of 3000 SN74LVC2GU04DBVR

CU4

SOT

(SOT

23)

–

DBV

Reel of 250 SN74LVC2GU04DBVT

CU4

SOT (SC 70) DCK

Reel of 3000

SN74LVC2GU04DCKR

SOT

(SC

70)

–

DCK

Reel

3000

SN74LVC2GU04DCKT

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

‡

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,

and one following character to designate the assembly/test site.

NanoStar and NanoFree are trademarks of Texas Instruments.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DBV OR DCK PACKAGE

(TOP VIEW)

GND

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

SN74LVC2GU04

DUAL INVERTER GATE

SCES197J – APRIL 1999 – REVISED FEBRUARY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

FUNCTION TABLE

(each inverter)

INPUT

OUTPUT

H L

L H

logic diagram (positive logic)

1A 1Y

2A 2Y

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, V

–0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high or low state, V

(see Notes 1 and 2) –0.5 V to V

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through V

or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 3): DBV package 165°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DCK package 259°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

YEA/YZA package 143°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

YEP/YZP package 123°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The value of V

is provided in the recommended operating conditions table.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

SN74LVC2GU04

DUAL INVERTER GATE

SCES197J – APRIL 1999 – REVISED FEBRUARY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 4)

MIN MAX UNIT

Supply voltage 1.65 5.5 V

High-level input voltage I

= –100 A 0.75 × V

Low-level input voltage I

= 100 A 0.25 × V

Input voltage 0 5.5 V

Output voltage 0 V

= 1.65 V –4

= 2.3 V –8

High-level output current

=3V

–16

–24

= 4.5 V –32

= 1.65 V 4

= 2.3 V 8

Low-level output current

=3V

= 4.5 V 32

Operating free-air temperature –40 85 °C

NOTE 4: All unused inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER TEST CONDITIONS V

MIN TYP

†

MAX UNIT

= –100 A 1.65 V to 5.5 V V

–0.1

= –4 mA 1.65 V 1.2

=0V

= –8 mA 2.3 V 1.9

= –16 mA

2.4

= –24 mA

2.3

= –32 mA 4.5 V 3.8

= 100 A 1.65 V to 5.5 V 0.1

= 4 mA 1.65 V 0.45

= 8 mA 2.3 V 0.3

= 16 mA

0.4

= 24 mA

0.55

= 32 mA 4.5 V 0.55

A inputs V

= 5.5 V or GND 0 to 5.5 V ±5 A

= 5.5 V or GND, I

= 0 1.65 V to 5.5 V 10 A

= V

or GND 3.3 V 7 pF

†

All typical values are at V

= 3.3 V, T

= 25°C.

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figure 1)

PARAMETER

FROM

(INPUT)

(OUTPUT)

= 1.8 V

± 0.15 V

= 2.5 V

± 0.2 V

= 3.3 V

± 0.3 V

= 5 V

± 0.5 V

UNIT

(INPUT)

(OUTPUT)

MIN MAX MIN MAX MIN MAX MIN MAX

1.2 5.5 1 4 1.1 3.7 1 3 ns

Part #	SN74LVC2GU04YEAR
Description	IC DUAL INVERTER GATE 6-DSBGA
Category	WAFER DIE
Availability	In Stock
Qty	2399

Qty	Price
1 - 503	$0.26405
504 - 1,007	$0.21004
1,008 - 1,511	$0.19804
1,512 - 2,015	$0.18404
2,016 +	$0.16403

SN74LVC2GU04YEAR

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