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74HC4040

Part # 74HC4040
Description
Category UNKNOWN
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1. General description
The 74HC4040; 74HCT4040 are high-speed Si-gate CMOS devices and are pin
compatible with the HEF4040B series. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC4040; 74HCT4040 are 12-stage binary ripple counters with a clock input (CP),
an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to
Q11). The counter advances on the HIGH-to-LOW transition of CP.
A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the
state of CP.
Each counter stage is a static toggle flip-flop.
2. Features
Multiple package options
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114-C exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 °Cto+85°C and from 40 °C to +125 °C
3. Applications
Frequency dividing circuits
Time delay circuits
Control counters
4. Quick reference data
74HC4040; 74HCT4040
12-stage binary ripple counter
Rev. 03 — 14 September 2005 Product data sheet
Table 1: Quick reference data
GND = 0 V; T
amb
=25
°
C; t
r
=t
f
= 6 ns.
Symbol Parameter Conditions Min Typ Max Unit
Type 74HC4040
t
PHL
, t
PLH
propagation delay
CP to Q0 C
L
= 15 pF; V
CC
= 5 V - 14 - ns
Qn to Qn+1 C
L
= 15 pF; V
CC
=5V - 8 - ns
74HC_HCT4040_3 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 14 September 2005 2 of 24
Philips Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in µW):
P
D
=C
PD
× V
CC
2
× f
i
+ (C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
(C
L
× V
CC
2
× f
o
) = sum of outputs;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V.
5. Ordering information
f
max
maximum operating
frequency
C
L
= 15 pF; V
CC
= 5 V - 90 - MHz
C
i
input capacitance - 3.5 - pF
C
PD
power dissipation
capacitance
V
I
= GND to V
CC
-20-pF
Type 74HCT4040
t
PHL
, t
PLH
propagation delay
CP to Q0 C
L
= 15 pF; V
CC
= 5 V - 16 - ns
Qn to Qn+1 C
L
= 15 pF; V
CC
=5V - 8 - ns
f
max
maximum operating
frequency
C
L
= 15 pF; V
CC
= 5 V - 79 - MHz
C
i
input capacitance - 3.5 - pF
C
PD
power dissipation
capacitance
V
I
= GND to V
CC
1.5 V - 20 - pF
Table 1: Quick reference data
…continued
GND = 0 V; T
amb
=25
°
C; t
r
=t
f
= 6 ns.
Symbol Parameter Conditions Min Typ Max Unit
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74HC4040N 40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil);
long body
SOT38-1
74HC4040D 40 °C to +125 °C SO16 plastic small outline package; 16 leads; body
width 3.9 mm
SOT109-1
74HC4040DB 40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body
width 5.3 mm
SOT338-1
74HC4040PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74HC4040BQ 40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
SOT763-1
74HCT4040N 40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil);
long body
SOT38-1
74HCT4040D 40 °C to +125 °C SO16 plastic small outline package; 16 leads; body
width 3.9 mm
SOT109-1
74HC_HCT4040_3 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 14 September 2005 3 of 24
Philips Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
6. Functional diagram
74HCT4040DB 40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body
width 5.3 mm
SOT338-1
74HCT4040PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74HCT4040BQ 40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
SOT763-1
Table 2: Ordering information
…continued
Type number Package
Temperature range Name Description Version
Fig 1. Functional diagram
Fig 2. Logic symbol Fig 3. IEC logic symbol
001aad589
12-STAGE COUNTER
9
Q0
7
Q1
6
Q2
5
Q3
3
Q4
2
Q5
4
Q6
13
Q7
12
Q8
14
Q9
15
Q10
1
Q11
10
11
T
C
D
MR
CP
001aad585
Q0 9
11 MR
10 CP
Q1 7
Q2 6
Q3 5
Q4 3
Q5 2
Q6 4
Q7 13
Q8 12
Q9 14
Q10 15
Q11 1
001aad586
09
11 CT = 0
+
10
CTR12
CT
7
6
5
3
2
4
13
12
14
15
11 1
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