TPS54394
SLVSBE6 –JUNE 2012
www.ti.com
POWERGOOD
The TPS54394 has power-good outputs that are measured on VFBx. The power-good function is activated after
the soft-start has finished. If the output voltage is within 16% of the target voltage, the internal comparator
detects the power good state and the power good signal becomes high after 1.5ms delay. During start-up, this
internal delay starts after 1.5ms of the UVP Enable delay time to avoid a glitch of the power-good signal. If the
feedback voltage goes outside of ±16% of the target value, the power-good signal becomes low after 2µs.
Current Sensing and Over-Current Protection
The output over-current protection (OCP) is implemented using a cycle-by-cycle valley detection control circuit.
The switch current is monitored by measuring the low-side FET switch voltage between the SWx and PGNDx
pins. This voltage is proportional to the switch current and the on-resistance of the FET. To improve the
measurement accuracy, the voltage sensing is temperature compensated.
During the on-time of the high-side FET switch, the switch current increases at a linear rate determined by VINx,
VOx, the on-time and the output inductor value. During the on-time of the low-side FET switch, this current
decreases linearly. The average value of the switch current is the load current I
OUTx
. If the sensed voltage on the
low-side FET is above the voltage proportional to the current limit, the converter keeps the low-side switch on
until the measured voltage falls below the voltage corresponding to the current limit and a new switching cycle
begins. In subsequent switching cycles, the on-time is set to the value determined for CCM and the current is
monitored in the same manner.
Important considerations for this type of over-current protection: The load current is one half of the peak-to-peak
inductor current higher than the over-current threshold. Also when the current is being limited, the output voltage
tends to fall as the demanded load current may be higher than the current available from the converter. When
the over current condition is removed, the output voltage returns to the regulated value. This protection is non-
latching.
Undervoltage Protection and Hiccup Mode
Hiccup mode of operation protects the power supply from being damaged during an over-current fault condition.
If the OCL comparator circuit detects an over-current event the output voltage falls. When the feedback voltage
falls below 68% of the reference voltage, the UVP comparator output goes high and an internal UVP delay
counter begins counting. After counting UVP delay time, the TPS54394 shuts off the power supply for a given
time (7x UVP Enable Delay Time) and then tries to re-start the power supply. If the over-load condition has been
removed, the power supply starts and operates normally; otherwise, the TPS54394 detects another over-current
event and shuts off the power supply again, repeating the previous cycle. Excess heat due to overload lasts for
only a short duration in the hiccup cycle, therefore the junction temperature of the power device is much lower.
UVLO Protection
Under-voltage lock out protection (UVLO) monitors the voltage of the V
REG5
pin. When the V
REG5
voltage is lower
than the UVLO threshold, the TPS54394 shuts down. As soon as the voltage increases above the UVLO
threshold, the converter starts again.
Thermal Shutdown
TPS54394 monitors its temperature. If the temperature exceeds the threshold value (typically 155°C), the device
shuts down. When the temperature falls below the threshold, the IC starts again.
When VIN1 starts up and VREG5 output voltage is below its nominal value, the thermal shutdown threshold is
lower than 155°C. As long as VIN1 rises, T
J
must be kept below 110°C.
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