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7207E

Part # 7207E
Description
Category SWITCH
Availability Out of Stock
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
22
Fig. 14. Timer Mode Register 1
Fig. 15. Timer Mode Register 2
b7b6 b5b4b3 b2b1b0
Timer mode register 1 (TMR1) [Address 00F4
16
]
B
After reset
W
Timer Mode Register 1
0
1
2
3
4
Name Functions
Timer 1 count source
selection bit 1
(TMR10, TMR15)
b5 b0
0 0: f(X
IN
)/16 or f(X
CIN
)/16 (See note)
0 1: f(X
IN
)/4096 or f(X
CIN
)/4096 (See note)
1 0: f(Xc
IN
)
1 1: External clock from TIM2 pin
Timer 2 count source
selection bit 1
(TMR11)
0:
Count source selected by bit 4 of TM1
1:
External clock from TIM2 pin
Timer 1 count
stop bit (TMR12)
0: Count start
1: Count stop
Timer 2 count stop
bit (TMR13)
0: Count start
1: Count stop
Timer 2 count source
selection bit 2
(TMR14)
R
0
0
0
0
0
WR
WR
WR
WR
WR
0: f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1: Timer 1 overflow
6
Timer 5 count source
selection bit 2 (TMR16)
0: Timer 2 overflow
1: Timer 4 overflow
0WR
7 Timer 6 internal count
source selection bit
(TMR17)
0WR
0: f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1: Timer 5 overflow
Note: Either f(X
IN
) or f(X
CIN
) is selected by bit 7 of the CPU mode register.
b7b6 b5b4b3 b2b1b0
Timer mode register 2 (TMR2) [Address 00F5
16
]
B
After reset
RW
Timer Mode Register 2
0
Name Functions
Timer 3 count source
selection bit (TMR20)
0 RW
1 Timer 4 count source
selection bit 2
(TMR21)
0RW
2
3
0
Timer 3 count
stop bit (TMR22)
0: Count start
1: Count stop
Timer 4 count stop bit
(TMR23)
0: Count start
1: Count stop
0
0
5
Timer 5 count stop bit
(TMR25)
0: Count start
1: Count stop
0
6
Timer 6 count stop bit
(TMR26)
0: Count start
1: Count stop
0
RW
RW
RW
RW
RW
7
Timer 5 count source
selection bit 1
(TMR27)
0: Count source selected by bit 0
of TMR3
1: Count source selected by bit 6
of TMR1
0 : f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1 : External clock from TIM3 pin
0 : Timer 3 overflow signal
1 : f(X
IN
)/16 or f(X
CIN
)/16 (See note)
Note: Either f(X
IN
) or f(X
CIN
) is selected by bit 7 of the CPU mode register.
4
Timer 4 count source
selection bit 1
(TMR24)
0RW
0: Count source selected by bit 1
of TMR2
1 : f(X
IN
)/2 or f(X
CIN
)/2 (See note)
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
23
Fig. 16. Timer Mode Register 3
b7b6 b5b4b3 b2b1b0
Timer mode register 3 (TMR3) [Address 020B
16
]
B
After reset
RW
Timer Mode Register 3
0
Name Functions
Timer 5 count source
selection bit 3
(TMR30)
0RW
0R
0 : f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1 : f(X
CIN
)
Note: Either f(X
IN
) or f(X
CIN
) is selected by bit 7 of the CPU mode register.
1
to
7
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are “0.”
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
24
Fig. 17. Timer Block Diagram
1/4096
1/2
CM
7
TMR1
5
1/8
8
8
8
TMR1
0
TMR1
2
TMR1
4
TMR1
1
TMR1
3
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Data bus
Timer 1
interrupt request
Timer 2
interrupt request
Timer 3
interrupt request
Reset
STP instruction
TMR2
0
TMR2
2
Timer 4
interrupt request
TMR2
4
TMR2
3
TMR2
1
TMR1
6
Timer 5
interrupt request
TMR2
7
TMR2
5
Timer 6
interrupt request
TMR1
7
TMR2
6
X
CIN
X
IN
TIM2
TIM3
Selection gate : Connected to
black side at
reset.
TMR1 : Timer mode register 1
TMR2 : Timer mode register 2
TMR3 : Timer mode register 3
CM : CPU mode register
FF
16
07
16
TMR1
5
TMR3
0
Timer 1 latch (8)
Timer 1 (8)
Timer 2 latch (8)
Timer 2 (8)
Timer 3 latch(8)
Timer 4 latch (8)
Timer 3 (8)
Timer 4 (8)
Timer 5 latch (8)
Timer 5 (8)
Timer 6 (8)
Timer 6 latch (8)
Notes 1: HIGH pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more.
2: When the external clock source is selected, timers 1, 2, and 3 are counted at a rising edge of input signal.
3: In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used.
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