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7207E

Part # 7207E
Description
Category SWITCH
Availability Out of Stock
Qty 0



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

112
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
Timer Mode Register 2
Timer Mode Register 1
Address 00F416
Address 00F516
b7b6 b5b4b3 b2b1b0
Timer mode register 1 (TMR1) [Address 00F4
16
]
B
After reset
W
Timer Mode Register 1
0
1
2
3
4
Name Functions
Timer 1 count source
selection bit 1
(TMR10, TMR15)
b5 b0
0 0: f(X
IN
)/16 or f(X
CIN
)/16 (See note)
0 1: f(X
IN
)/4096 or f(X
CIN
)/4096 (See note)
1 0: f(Xc
IN
)
1 1: External clock from TIM2 pin
Timer 2 count source
selection bit 1
(TMR11)
0:
Count source selected by bit 4 of TM1
1:
External clock from TIM2 pin
Timer 1 count
stop bit (TMR12)
0: Count start
1: Count stop
Timer 2 count stop
bit (TMR13)
0: Count start
1: Count stop
Timer 2 count source
selection bit 2
(TMR14)
R
0
0
0
0
0
WR
WR
WR
WR
WR
0: f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1: Timer 1 overflow
6
Timer 5 count source
selection bit 2 (TMR16)
0: Timer 2 overflow
1: Timer 4 overflow
0WR
7 Timer 6 internal count
source selection bit
(TMR17)
0WR
0: f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1: Timer 5 overflow
Note: Either f(X
IN
) or f(X
CIN
) is selected by bit 7 of the CPU mode register.
b7b6 b5b4b3 b2b1b0
Timer mode register 2 (TMR2) [Address 00F5
16
]
B
After reset
RW
Timer Mode Register 2
0
Name Functions
Timer 3 count source
selection bit (TMR20)
0 RW
1 Timer 4 count source
selection bit 2
(TMR21)
0RW
2
3
0
Timer 3 count
stop bit (TMR22)
0: Count start
1: Count stop
Timer 4 count stop bit
(TMR23)
0: Count start
1: Count stop
0
0
5
Timer 5 count stop bit
(TMR25)
0: Count start
1: Count stop
0
6
Timer 6 count stop bit
(TMR26)
0: Count start
1: Count stop
0
RW
RW
RW
RW
RW
7
Timer 5 count source
selection bit 1
(TMR27)
0: Count source selected by bit 0
of TMR3
1: Count source selected by bit 6
of TMR1
0 : f(X
IN
)/16 or f(X
CIN
)/16 (See note)
1 : External clock from TIM3 pin
0 : Timer 3 overflow signal
1 : f(X
IN
)/16 or f(X
CIN
)/16 (See note)
Note: Either f(X
IN
) or f(X
CIN
) is selected by bit 7 of the CPU mode register.
4
Timer 4 count source
selection bit 1
(TMR24)
0RW
0: Count source selected by bit 1
of TMR2
1 : f(X
IN
)/2 or f(X
CIN
)/2 (See note)
113
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
CPU Mode Register
Address 00FB16
b7b6 b5b4b3 b2b1b0
B
After reset
RW
CPU Mode Register
0, 1
2
3
0
1
1
1
0
0
Name Functions
Processor mode bits
(CM0, CM1)
0 0: Single-chip mode
0 1:
1 0: Not available
1 1:
Fix these bits to “1.”
1
Stack page selection
bit (CM2) (See note 1)
1
b1 b0
0: 0 page
1: 1 page
00
CPU mode register (CPUM) (CM) [Address 00FB
16
]
RW
RW
RW
5
6
Main Clock (X
IN
–X
OUT
)
stop bit
(CM6)
RW
RW
X
COUT
drivability
selection bit (CM5)
0: LOW drive
1: HIGH drive
0: Oscillating
1: Stopped
7
Internal system clock
selection bit
(CM7)
RW
0: X
IN
–X
OUT
selected
(high-speed mode)
1: X
CIN
–X
COUT
selected
(high-speed mode)
Notes 1: This bit is set to “1” after the reset release.
2: The internal system clock
φ
stops at HIGH.
4
Internal system clock
output selection bit
(CM4) (See note 2)
0: Output is stopped
1: Internal system
clock
φ
output
RW
114
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
Interrupt Reguest Register 2
Interrupt Reguest Register 1
Address 00FC16
Address 00FD16
b7b6 b5b4b3 b2b1b0
Interrupt request register 1 (IREQ1) [Address 00FC
B Name Functions
After reset
RW
Interrupt Request Register 1
0
0 : No interrupt request issued
1 : Interrupt request issued
Timer 1 interrupt
request bit (TM1R)
1 Timer 2 interrupt
request bit (TM2R)
2 Timer 3 interrupt
request bit (TM3R)
3
Timer 4 interrupt
request bit (TM4R)
4 CRT interrupt
request bit (CRTR)
5V
SYNC
interrupt
request bit (VSCR)
6
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0
0
0
0
0
0
0
Multi-master I
2
C-BUS
interface interrupt
request bit (IICR)
0 : No interrupt request issued
1 : Interrupt request issued
16
]
R
R
R
R
R
R
R
7 Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
R
0
b7b6 b5b4b3 b2b1b0
Interrupt request register 2 (IREQ2) [Address 00FD
B Name Functions
After reset
RW
Interrupt Request Register 2
0
INT1 interrupt
request bit (ITIR)
0 : No interrupt request issued
1 : Interrupt request issued
1
INT2 interrupt
request bit (IT2R)
2
Serial I/O interrupt
request bit (SIR)
4
f(X
IN
)/4096 interrupt
request bit (MSR)
3,6
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are “0.”
7
Fix this bit to “0.”
0
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0
: “0” can be set by software, but “1” cannot be set.
0
0
0
0
0
0 : No interrupt request issued
1 : Interrupt request issued
16
]
R
R
R
R—
R
RW
5
Timer 5 • 6 interrupt
request bit (TM56R)
0 : No interrupt request issued
1 : Interrupt request issued
0 R
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