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7207E

Part # 7207E
Description
Category SWITCH
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
79
ADDRESSING MODE
The memory access is reinforced with 17 kinds of addressing modes.
Refer to SERIES 740 <Software> User’s Manual for details.
MACHINE INSTRUCTIONS
There are 71 machine instructions. Refer to SERIES 740 <Soft- ware>
User’s Manual for details.
PROGRAMMING NOTES
(1) The divide ratio of the timer is 1/(n+1).
(2) Even though the BBC and BBS instructions are executed imme-
diately after the interrupt request bits are modified (by the pro-
gram), those instructions are only valid for the contents before
the modification. At least one instruction cycle is needed (such as
an NOP) between the modification of the interrupt request bits
and the execution of the BBC and BBS instructions.
(3) After the ADC and SBC instructions are executed (in the decimal
mode), one instruction cycle (such as an NOP) is needed before
the SEC, CLC, or CLD instruction is executed.
(4) An NOP instruction is needed immediately after the execution of
a PLP instruction.
(5) In order to avoid noise and latch-up, connect a bypass capacitor
( 0.1 µF) directly between the VCC pin–VSS pin and the VCC pin–
CNVSS pin, using a thick wire.
AUTO-CLEAR CIRCUIT
When a power source is supplied, the auto-clear function will oper-
______
ate by connecting the following circuit to the RESET pin.
Fig. 81. Auto-clear Circuit Example
Fig. 80. Display Oscillation Circuit
DISPLAY OSCILLATION CIRCUIT
The CRT display clock oscillation circuit has a built-in clock oscilla-
tion circuits, so that a clock for CRT display can be obtained simply
by connecting an LC, an RC, a quartz-crystal oscillator or a ceramic
resonator across the pins OSC1 and OSC2. Which of the sub-clock
or the display oscillation circuit is selected by setting bits 0 and 1 of
the CRT clock selection register (address 020916).
OSC2OSC1
L
C1
C2
RESET
Vss
Vcc
Circuit example 1
RESET
Vss
Vcc
Circuit example 2
Note : Make the level change from LOW to HIGH at the point at
which the power source voltage exceeds the specified
voltage.
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
80
Name of Programming Adapter
PCA4762
PCA7417
Product
M37207EFSP
M37207EFFP
DATA REQUIRED FOR MASK ORDERS
The following are necessary when ordering a mask ROM produc-
tion:
(1) Mask ROM Order Confirmation Form
(2) Mark Specification Form
(3) Data to be written to ROM, in EPROM form (32-pin DIP type
27C101, three identical copies)
PROM Programming Method
The built-in PROM of the One Time PROM version (blank) and the
built-in EPROM version can be read or programmed with a general-
purpose PROM programmer using a special programming adapter.
The PROM of the One Time PROM version (blank) is not tested or
screened in the assembly process nor any following processes. To
ensure proper operation after programming, the procedure shown in
Figure 82 is recommended to verify programming.
Fig. 82. Programming and Testing of One Time PROM Version
Programming with
PROM programmer
Screening (Caution)
(150°C for 40 hours)
Verification with
PROM programmer
Functional check in target device
Caution : The screening temperature is far higher
than the storage temperature. Never
expose to 150°C exceeding 100 hours.
MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
81
Min.
4.5
0
0.8VCC
0.7VCC
0
0
0
7.9
29
6.0
Typ.
5.0
0
8.0
32
Max.
5.5
0
VCC
VCC
0.4 VCC
0.3 VCC
0.2 VCC
1
2
1
10
6
8.1
35
13
100
1
400
Power source voltage (Note 4), During CPU, CRT operation
Power source voltage
HIGH input voltage P00–P07, P10–P17, P20–P27, P30–P36,
P60–P67, P70, P71, HSYNC, VSYNC,
______
RESET, XIN, XCIN, OSC1,
P40–P47 (including when using serial I/O)
HIGH input voltage SDA3, SCL3, S DA2, SCL2, SDA1, SCL1
(When using I
2
C-BUS)
LOW input voltage P00–P07, P10–P17, P20–P27, P30, P31,
P35, P40–P47, P70, P71
LOW input voltage SDA3, SCL3, SDA2, SCL2, SDA1, SCL1
(When using I
2
C-BUS)
LOW input voltage
______
HSYNC, VSYNC, RESET, P32–P34, P36,
P41, P42, P44–P46, XIN, XCIN, OSC1
When using serial I/O; SOUT2, SCLK2, SIN2,
SOUT1, SCLK1, SIN1
HIGH average output current (Note 1)
R, G, B, I, OUT, D-A, P00–P07, P10–P17,
P20–P27, P30, P31
LOW average output current (Note 2)
R, G, B, I, OUT, D-A, P00–P07, P10–P17,
P20–P23, P30–P36
LOW average output current (Note 2)
P46, P47, P60–P67
LOW average output current (Note 3)
P24–P27
LOW average output current (Note 2)
P40–P45
Oscillation frequency (for CPU operation) (Note 5) XIN
Oscillation frequency (for sub-clock operation) (Note 7)XCIN
Oscillation frequency (for CRT display) (Note 6) OSC1
Input frequency TIM2, TIM3, INT1, INT2
Input frequency SCLK1, SCLK2
Input frequency SCL1, SCL2, SCL3
Symbol
VCC
VI
VI
VO
VO
IOH
IOL1
IOL2
IOL3
IOL4
Pd
Topr
Tstg
ABSOLUTE MAXIMUM RATINGS
Conditions
All voltages are based
on VSS.
Output transistors are
cut off.
Ta = 25 °C
Ratings
–0.3 to 6
–0.3 to 6
–0.3 to VCC + 0.3
–0.3 to VCC + 0.3
–0.3 to 13
0 to 1 (Note 1)
0 to 2 (Note 2)
0 to 1 (Note 2)
0 to 10 (Note 3)
0 to 6 (Note 2)
550
–10 to 70
–40 to 125
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
mW
°C
°C
Parameter
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
MHz
kHz
MHz
kHz
MHz
kHz
RECOMMENDED OPERATING CONDITIONS (Ta = –10 °C to 70 °C, VCC = 5 V ± 10 %, unless otherwise noted)
VCC
VSS
VIH1
VIH2
VIL1
VIL2
VIL3
IOH
IOL1
IOL2
IOL3
IOL4
f(XIN)
f(XCIN)
fOSC
fhs1
fhs2
fhs3
Symbol Parameter
Unit
Limits
Power source voltage VCC
Input voltage CNVSS
Input voltage P00–P07, P10–P17, P20–P27,
P30–P36, P40–P47, P60–P67,
P70, P71,OSC1, XIN, HSYNC,
______
VSYNC, RESET, XCIN,
AD1–AD8
Output voltage P00–P07, P10–P17, P20–P27,
P30–P36, P40–P45, R, G, B, I,
OUT, D-A, XOUT, XCOUT,
OSC2
Output voltage P46, P47, P60–P67
Circuit current R, G, B, I, OUT, P00–P07,
P10–P17, P20–P27, P30, P31,
D-A
Circuit current R, G, B, I, OUT, P00–P07,
P10–P17, P20–P23,P30–P36,
D-A
Circuit current P46, P47, P60–P67
Circuit current P24–P27
Circuit current P40–P45
Power dissipation
Operating temperature
Storage temperature
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