MITSUBISHI MICROCOMPUTERS
M37207MF-XXXSP/FP, M37207M8-XXXSP
M37207EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
76
Fig. 76. Ceramic Resonator Circuit Example
Fig. 77. External Clock Input Circuit Example
(3) Low-Speed Mode
If the internal clock is generated from the sub-clock (XCIN), a low
power consumption operation can be realized by stopping only the
main clock X
IN. To stop the main clock, set bit 6 (CM6) of the CPU
mode register (00FB
16) to “1.” When the main clock XIN is restarted,
the program must allow enough time to for oscillation to stabilize.
Note that in low-power-consumption mode the X
CIN-XCOUT drivability
can be reduced, allowing even lower power consumption (20µA with
f (X
CIN) = 32kHz). To reduce the XCIN-XCOUT drivability, clear bit 5
(CM
5) of the CPU mode register (00FB16) to “0.” At reset, this bit is
set to “1” and strong drivability is selected to help the oscillation to
start. When an STP instruction is executed, set this bit to “1” by soft-
ware before executing.
CLOCK GENERATING CIRCUIT
This microcomputer has 2 built-in oscillation circuits. An oscillation
circuit can be formed by connecting a resonator between X
IN and
X
OUT (XCIN and XCOUT). Use the circuit constants in accordance with
the resonator manufacturer’s recommended values. No external re-
sistor is needed between X
IN and XOUT since a feed-back resistor
exists on-chip. However, an external feed-back resistor is needed
between X
CIN and XCOUT. When using XCIN-XCOUT as sub-clock,
clear bits 7 and 6 of the mixing control register to “0.” To supply a
clock signal externally, input it to the X
IN (XCIN) pin and make the
X
OUT (XCOUT) pin open. When not using XCIN clock, connect the
X
CIN to VSS and make the XCOUT pin open.
After reset has completed, the internal clock φ is half the frequency of
X
IN. Immediately after poweron, both the XIN and XCIN clock start
oscillating. To set the internal clock φ to low-speed operation mode,
set bit 7 of the CPU mode register (address 00FB
16) to “1.”
Oscillation Control
(1) Stop mode
The built-in clock generating circuit is shown in Figure 78. When the
STP instruction is executed, the internal clock φ stops at HIGH. At
the same time, timers 3 and 4 are connected by hardware and “FF
16”
is set in timer 3 and “07
16” is set in the timer 4. Select f(XIN)/16 or
f(X
CIN)/16 as the timer 3 count source (set bit 0 of the timer mode
register 2 to “0” before the execution of the STP instruction). More-
over, set the timer 3 and timer 4 interrupt enable bits to disabled (“0”)
before execution of the STP instruction. The oscillator restarts when
external interrupt is accepted. However, the internal clock φ
keeps its
HIGH until timer 4 overflows, allowing time for oscillation stabilization
when a ceramic resonator or a quartz-crystal oscillator is used.
(2) Wait mode
When the WIT instruction is executed, the internal clock
φ
stops in
the “H” level but the oscillator continues running. This wait state is
released at reset or when an interrupt is accepted (Note). Since the
oscillator does not stop, the next instruction can be executed at once.
Note: In the wait mode, the following interrupts are invalid.
(1) V
SYNC interrupt
(2) CRT interrupt
(3) f(X
IN)/4096 interrupt
(4) Timer 1 and 2 interrupts using TIM2 pin input as count
source
(5) Timer 1 interrupt using f(X
IN)/4096 or f(XCIN)/4096 as
count source
(6) Timer 3 interrupt using TIM3 pin input as count source
(7) Multi-master I
2
C-BUS interface interrupt
(8) Timer 4 interrupt using f(X
IN)/2 or f(XCIN)/2 as count souce
X
CIN
X
IN
C
CIN
Microcomputer
X
COUT
R
f
R
d
C
COUT
X
OUT
C
IN
C
OUT
26 25 30 31
X
CIN
Microcomputer
External oscillation
circuit or external
pulse
X
COUT
X
IN
X
OUT
Open Open
External oscillation
circuit
Vcc
Vss
Vcc
Vss
