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31761

Part # 31761
Description
Category RELAY
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Datasheet 289
Ballout and Package Information
Figure 12. MCH Ballout Diagram (Top View Middle – Columns 30–16)
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
BE
VSS VCC_DDR VSS VCC_DDR VSS VCC_DDR
DDR_B_
MA_8
VSS
DDR_A_
DQ_19
BE
BD
DDR_A_
MA_6
DDR_A
_MA_11
DDR_A_
CKE_0
DDR_B_
MA_4
DDR_B_
CKE_1
DDR_B_
CKE_0
BD
BC
VCC_DDR
DDR_A_
MA_8
VCC_DDR
DDR_A_
CKE_3
VCC_DDR
DDR_B_
MA_1
VCC_DDR
DDR_B_
MA_14
VSS
BC
BB
DDR_A_
MA_2
DDR_A_
MA_3
DDR_A_
MA_5
DDR_A_
MA_12
DDR_A_
BS_2
DDR_A_
CKE_2
DDR_B_
BS_0
DDR3_DRA
MRSTB
DDR_B_
MA_2
DDR_B_
MA_5
DDR_B_
MA_6
DDR_B_
MA_9
DDR_B_
BS_2
DDR_B_
CKE_2
DDR_A_
DQ_18
BB
BA
DDR_A_
MA_4
DDR_A_
MA_9
DDR_A_MA_
14
DDR_B_
MA_3
DDR_B_
MA_11
DDR_B_CKE
_3
BA
AY
DDR_B_
CK_4
DDR_B_
CKB_4
DDR_A_
MA_7
DDR_B_
DM_3
DDR_A_
CKE_1
VCC_DDR
DDR_B_
MA_0
DDR_A_
DQ_25
DDR_B_
MA_7
DDR_B_
MA_12
DDR_B_
DQ_16
AY
AW
DDR_B_
CK_0
VSS VSS
DDR_B_
DQ_24
DDR_B_
MA_10
DDR_B_
BS_1
DDR_A_
DQ_31
VSS
DDR_A_
DQ_29
VSS
DDR_B_
DM_2
AW
AV
DDR_B_
CKB_0
VSS
DDR_B_
DQ_27
DDR_B_
DQ_25
VSS VSS VSS
DDR_A_
DQSB_3
DDR_A_
DQ_28
VSS
DDR_B_
DQ_17
AV
AU AU
AT
VSS VSS
DDR_B_
DQ_26
DDR_B_
DQ_30
VSS VSS
DDR_A_
DQ_27
DDR_A_
DQS_3
DDR_B_
DQ_19
DDR_B_
DQ_22
VSS
AT
AR
VSS
DDR_B_
CK_1
VSS
DDR_B_
DQS_3
DDR_B_
DQSB_3
VSS VSS VSS VSS
DDR_B_
DQ_23
DDR_B_
DQ_21
AR
AP
VSS
DDR_B_
CKB_1
DDR_B_
DQ_31
VSS
DDR_B_
DQ_29
VSS VSS
DDR_A_
DM_3
DDR_B_
DQ_18
VSS
DDR_B_
DQSB_2
AP
AN
RSVD
DDR_A_
CK_1
DDR_A_
CK_4
RSVD
DDR_B_
DQ_28
VSS
DDR_A_
DQ_26
DDR_A_
DQ_30
DDR_A_
DQ_24
DDR_B_
DQS_2
DDR_B_
DQ_20
AN
AM
VCC_CL
DDR_A_
CKB_1
DDR_A_
CKB_4
RSVD VSS VCC_CL VCC_CL VSS PWROK RSTINB VSS
AM
AL
VCC_CL RSVD VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL
AL
AK AK
AJ
VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL VCC_CL
AJ
AH
VCC_CL RSVD VSS VCC VSS VCC VSS VCC VSS VCC VCC VCC VCC
AH
AG
VCC_CL RSVD VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC VCC
AG
AF
VCC_CL VCC VSS VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC
AF
AE
VCC_CL VCC VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC VCC
AE
AD
VCC_CL VCC VSS VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC
AD
AC
VCC_CL VCC VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC VCC
AC
AB
VCC_CL VCC VSS VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC
AB
AA
VCC_CL VCC VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC VCC
AA
Y
VCC_CL VCC VSS VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC
Y
W
VCC_CL VCC VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC VCC
W
V
VCC_CL VCC VSS VCC VSS VCC VSS VCC VSS VCC VSS VCC VCC
V
U
VCCAUXVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCC
U
T T
R
VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX RSVD VSS RSVD VCC VCC
R
P
HPL_
CLKINN
HPL_CLKINP VSS VSS VSS VSS VSS RSVD RSVD_P19 VSS ICH_SYNCB
P
N
FSB_DB_37
FSB_DINVB
_2
VSS
FSB_
DSTBPB_2
FSB_DB_42 VSS VSS RSVD VSS RSVD VSS
N
M
FSB_DB_35 VSS VTT_FSB
FSB_
DSTBNB_2
VSS VSS BSEL0 ALLZTEST RSVD_M19 VSS RSVD
M
L
FSB_DB_36 FSB_DB_41 VTT_FSB FSB_DB_43 FSB_DB_44 VSS XORTEST VSS RSVD RSVD
VCC3_3_
L16
L
K
VSS FSB_DB_40 VTT_FSB VTT_FSB FSB_DB_46 VSS RSVD RSVD EXP_SLR VSS RSVD_K16
K
J J
H
FSB_DB_39 VTT_FSB VTT_FSB VTT_FSB FSB_DB_45 VSS VSS RSVD VSS VSS RSVD_H16
H
G
FSB_DB_38 VTT_FSB VTT_FSB VTT_FSB FSB_DB_47 VSS RSVD TCEN MTYPE VSS
VCC3_3_
G16
G
F
VTT_FSB VTT_FSB VTT_FSB VTT_FSB VSS VSS VSS_F22 BSEL1 RSVD BSEL2 VSS
F
E
VTT_FSB FSB_DVREF VCC_E25 VSS VSS PEG_TXN_0
E
D
VTT_FSB VSS FSB_SCOMP
FSB_
ACCVREF
VCCA_HPL VCCA_HPL VSS_D24 VSS VSS_D22 VSS_D21 VCCA_EXP EXP_CLKINP
EXP_CLKIN
N
VSS PEG_TXP_0
D
C
VSS
FSB_
SCOMPB
FSB_RCOMP VSS_C24 VSS_C23 VSS VSS VCC_C18 VCCR_EXP
C
B
VSS VCCA_MPL VCC_B25 VSS_B21 RSVD VSS_B17
B
A
VTT_FSB FSB_SWING VSS VSS_A24 VCC3_3 VSS
VCCAPLL_
EXP
VSS PEG_RXP_0
A
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Ballout and Package Information
290 Datasheet
Figure 13. MCH Ballout Diagram (Top View Left – Columns 15–1)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
BE
VSS
DDR_A_
DQ_11
VSS
DDR_A_
DQ_3
VSS VSS NC TEST1
BE
BD
DDR_A_
DQ_22
DDR_A_
DQ_16
DDR_A_
DQ_14
DDR_A_
DQ_8
DDR_A_
DQ_6
DDR_A_
DQ_1
DDR_A_DQ_
4
VSS NC
BD
BC
DDR_A_
DM_2
VSS
DDR_A_
DM_1
DDR_A_
DQ_13
VSS
DDR_A_DQ
SB_0
DDR_A_
DQ_0
VSS RSVD VSS
BC
BB
DDR_A_
DQ_23
DDR_A_
DQ_17
DDR_A_
DQ_21
DDR_A_
DQ_10
DDR_A_
DQ_15
DDR_A_
DQ_9
DDR_A_DQ_
2
DDR_A_
DQ_7
DDR_A_
DM_0
DDR_A_
DQ_5
VSS_BB3 VSS
BB
BA
DDR_A_
DQS_2
DDR_A_
DQ_20
DDR_A_
DQS_1
DDR_A_
DQ_12
DDR_A_DQ
S_0
VSS_BA5 VSS_BA4
BA
AY
DDR_A_
DQSB_2
DDR_B_
DQ_9
DDR_B_
DQ_8
DDR_A_
DQSB_1
VSS
DDR_B_
DM_0
DDR_B_
DQ_1
DDR_
RCOMPXPD
DDR_
RCOMPXPU
VSS_AY3 VSS_AY1
AY
AW
VSS
DDR_B_
DQ_13
DDR_B_
DQ_12
DDR_B_
DQ_7
DDR_B_
DQS_0
DDR_B_
DQ_0
VSS
DDR_B_
DQ_5
VSS VSS_AW2
AW
AV
DDR_B_
DQ_11
VSS VSS VSS VSS
DDR_B_
DQ_4
DDR_VREF VSS VSS VSS VSS
AV
AU
VCCA_EXP2 VSS
PEG2_TXP_
14
AU
AT
DDR_B_
DQ_10
DDR_B_
DM_1
DDR_B_
DQ_3
DDR_B_
DQ_2
DDR_B_
DQSB_0
VSS
DDR_
RCOMPVOL
DDR_RCOM
PVOH
PEG2_
TXP_13
PEG2_TXN_
14
VSS
AT
AR
VSS
DDR_B_
DQS_1
DDR_B_
DQSB_1
DDR_B_
DQ_6
VCCAPLL_
EXP2
VSS VSS VSS
PEG2_
TXN_13
VSS
PEG2_TXP_
12
AR
AP
DDR_B_
DQ_15
VSS RSVD
PEG2_
RXN_15
PEG2_
RXP_15
VSS
PEG2_
TXP_15
PEG2_
TXN_15
PEG2_
TXP_11
VCCR_EXP
PEG2_TXN_
12
AP
AN
DDR_B_
DQ_14
RSVD RSVD
DDR3_DRA
M_PWROK
EXP2_
COMPI
EXP2_
COMPO
VSS VSS
PEG2_
TXN_11
VSS
PEG2_TXP_
10
AN
AM
RSVD
PEG2_
TXP_9
PEG2_TXN_
10
VSS
AM
AL
CL_PWROK VSS
PEG2_
RXP_13
PEG2_
RXN_13
VSS
PEG2_
RXN_14
PEG2_
RXP_14
PEG2_
TXN_9
VSS
PEG2_TXP_
8
AL
AK
CL_DATA CL_CLK
PEG2_
RXN_12
PEG2_
RXP_12
VSS VSS VSS VSS VSS
PEG2_
TXP_7
VCCR_EXP
PEG2_TXN_
8
AK
AJ
PEG2_
TXN_7
VSS
PEG2_TXP_
6
AJ
AH
VCC_CL VCC_CL
PEG2_
RXN_9
VSS
PEG2_
RXP_10
PEG2_
RXN_10
VSS
PEG2_
RXP_11
PEG2_
RXN_11
PEG2_
TXP_5
PEG2_TXN_
6
VSS
AH
AG
VCC CL_VREF VSS
PEG2_
RXP_9
CL_RSTB VSS VSS VSS VSS
PEG2_
TXN_5
VSS
PEG2_TXP_
4
AG
AF
PEG2_TXP_
3
VCCR_EXP
PEG2_TXN_
4
AF
AE
VCCR_EXP
EXP2_
CLKINP
PEG2_
RXP_6
VSS
PEG2_
RXN_7
PEG2_
RXP_7
VSS
PEG2_
RXP_8
PEG2_
RXN_8
PEG2_
TXN_3
VSS
PEG2_TXP_
2
AE
AD
VCCR_EXP
EXP2_
CLKINN
VSS
PEG2_
RXN_6
VCC_EXP VCC_EXP VCC_EXP VCC_EXP VSS
PEG2_
TXP_1
PEG2_TXN_
2
VSS
AD
AC
VCCR_EXP VSS
PEG2_
RXP_3
VSS
PEG2_
RXP_4
PEG2_
RXN_4
VSS
PEG2_
RXN_5
PEG2_
RXP_5
PEG2_
TXN_1
VCCR_EXP VSS
AC
AB
VCC VCCR_EXP
VCC_EXT_
PLL
PEG2_
RXN_3
VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP
PEG2_TXP_
0
PEG2_TXN_
0
AB
AA
VCCR_EXP VCCR_EXP
PEG2_
RXN_0
VSS
PEG2_
RXN_1
PEG2_
RXP_1
VSS
PEG2_RXN_
2
PEG2_RXP_
2
VCC_EXP VCC_EXP VCC_EXP
AA
Y
VCC_EXP VCC_EXP VCC_EXP
Y
W
VCCR_EXP VSS VSS
PEG2_
RXP_0
VCC_EXP VCC_EXP VCC_EXP VCC_EXP VSS VCC_EXP VCC_EXP VCC_EXP
W
V
VCCR_EXP VCCR_EXP VSS RSVD DMI_TXN_3 DMI_TXP_3 VSS DMI_RXP_3 DMI_RXN_3 VCC_EXP VCC_EXP VCC_EXP
V
U
VCC_EXP VCC_EXP VCC_EXP
U
T
VCCR_EXP VCCR_EXP VSS RSVD VSS EXP_COMPO DMI_RXN_1 DMI_RXP_1 VSS VCC_EXP VCC_EXP DMI_TXN_2
T
R
VSS VSS VSS EXP_COMPI VSS DMI_TXP_0 DMI_TXN_0 DMI_RXN_2 VSS DMI_TXP_2
R
P
VSS DMI_RXP_2 DMI_TXN_1 VSS
P
N
VCC_N15 PEG_RXP_4 RSVD RSVD
PEG_
RXN_15
PEG_
RXP_15
VSS VSS DMI_RXP_0 VSS DMI_TXP_1
N
M
VSS_M15 PEG_RXN_4 VSS
PEG_
RXP_12
VSS
PEG_
RXN_13
PEG_
RXP_13
VSS DMI_RXN_0 VCCR_EXP
PEG_
TXP_15
M
L
VSS PEG_RXP_3 PEG_RXN_6 VSS
PEG_RXN_1
2
VSS VSS VSS
PEG_
TXP_14
VSS
PEG_
TXN_15
L
K
VSS PEG_RXN_3 VSS PEG_RXP_6 VSS
PEG_
RXN_11
PEG_
RXP_11
VSS
PEG_
TXN_14
PEG_
RXP_14
VSS
K
J
PEG_
TXP_13
VSS
PEG_RXN_1
4
J
H
RSVD_H15 PEG_RXP_2 PEG_RXP_5 VSS PEG_RXN_7 VSS VSS VSS
PEG_
TXN_13
VCCR_EXP
PEG_
TXP_12
H
G
RSVD_G15 PEG_RXN_2 PEG_RXN_5 VSS PEG_RXP_7 VSS VSS PEG_RXN_9 VSS
PEG_
TXN_12
G
F
VSS VSS VSS VSS VSS VSS PEG_RXP_9 VSS
PEG_
TXP_11
PEG_
TXP_10
VSS
F
E
PEG_TXP_1 PEG_TXP_2 PEG_TXN_4 PEG_TXN_6 PEG_RXP_8 VSS
PEG_
TXN_11
E
D
VSS PEG_TXN_1 VSS PEG_TXN_2 VSS PEG_TXP_4 PEG_TXP_6 VSS PEG_RXN_8 VSS
PEG_
TXN_10
PEG_
RXP_10
D
C
PEG_RXN_1 VCCR_EXP PEG_TXN_5 VSS VCCR_EXP PEG_TXP_8 PEG_TXN_8 VSS
PEG_
RXN_10
VSS
C
B
PEG_RXN_0 PEG_RXP_1 PEG_TXP_3 PEG_TXP_5 PEG_TXP_7 PEG_TXN_9 PEG_TXP_9 VSS NC
B
A
VSS PEG_TXN_3 VSS PEG_TXN_7 VSS VSS TEST2
A
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Datasheet 291
Ballout and Package Information
Table 28. MCH
Ballout Sorted By Name
Signal Name Ball #
ALLZTEST M21
BSEL0 M22
BSEL1 F21
BSEL2 F18
CL_CLK AK14
CL_DATA AK15
CL_PWROK AL13
CL_RSTB AG11
CL_VREF AG14
DDR_A_BS_0 BC37
DDR_A_BS_1 BB36
DDR_A_BS_2 BB26
DDR_A_CASB BB41
DDR_A_CB_0 AL33
DDR_A_CB_1 AN35
DDR_A_CB_2 AK38
DDR_A_CB_3 AK35
DDR_A_CB_4 AK33
DDR_A_CB_5 AL34
DDR_A_CB_6 AK34
DDR_A_CB_7 AK39
DDR_A_CK_0 AT33
DDR_A_CK_1 AN28
DDR_A_CK_2 AT34
DDR_A_CK_3 AV31
DDR_A_CK_4 AN27
DDR_A_CK_5 AT35
DDR_A_CKB_0 AR33
DDR_A_CKB_1 AM28
DDR_A_CKB_2 AV35
DDR_A_CKB_3 AT31
DDR_A_CKB_4 AM27
DDR_A_CKB_5 AT36
DDR_A_CKE_0 BD25
DDR_A_CKE_1 AY24
DDR_A_CKE_2 BB25
DDR_A_CKE_3 BC24
DDR_A_CSB_0 BA40
DDR_A_CSB_1 BD42
DDR_A_CSB_2 BB39
DDR_A_CSB_3 AY43
DDR_A_DM_0 BB5
DDR_A_DM_1 BC10
DDR_A_DM_2 BC14
DDR_A_DM_3 AP21
DDR_A_DM_4 AU44
DDR_A_DM_5 AN44
DDR_A_DM_6 AE44
DDR_A_DM_7 AB40
DDR_A_DQ_0 BC4
DDR_A_DQ_1 BD4
DDR_A_DQ_2 BB8
DDR_A_DQ_3 BE8
DDR_A_DQ_4 BD3
DDR_A_DQ_5 BB4
DDR_A_DQ_6 BD7
DDR_A_DQ_7 BB7
DDR_A_DQ_8 BD9
DDR_A_DQ_9 BB10
DDR_A_DQ_10 BB12
DDR_A_DQ_11 BE12
DDR_A_DQ_12 BA9
DDR_A_DQ_13 BC9
DDR_A_DQ_14 BD11
DDR_A_DQ_15 BB11
DDR_A_DQ_16 BD13
DDR_A_DQ_17 BB14
DDR_A_DQ_18 BB16
DDR_A_DQ_19 BE16
DDR_A_DQ_20 BA13
DDR_A_DQ_21 BB13
DDR_A_DQ_22 BD15
DDR_A_DQ_23 BB15
DDR_A_DQ_24 AN19
DDR_A_DQ_25 AY21
DDR_A_DQ_26 AN22
DDR_A_DQ_27 AT22
DDR_A_DQ_28 AV19
DDR_A_DQ_29 AW19
DDR_A_DQ_30 AN21
DDR_A_DQ_31 AW22
DDR_A_DQ_32 AV42
DDR_A_DQ_33 AU43
DDR_A_DQ_34 AR44
DDR_A_DQ_35 AR42
DDR_A_DQ_36 AW42
DDR_A_DQ_37 AU41
DDR_A_DQ_38 AR41
DDR_A_DQ_39 AR40
DDR_A_DQ_40 AN41
Table 28. MCH
Ballout Sorted By Name
Signal Name Ball #
DDR_A_DQ_41 AN42
DDR_A_DQ_42 AL44
DDR_A_DQ_43 AL42
DDR_A_DQ_44 AP42
DDR_A_DQ_45 AP45
DDR_A_DQ_46 AL40
DDR_A_DQ_47 AL41
DDR_A_DQ_48 AE41
DDR_A_DQ_49 AE42
DDR_A_DQ_50 AC42
DDR_A_DQ_51 AC45
DDR_A_DQ_52 AF42
DDR_A_DQ_53 AF45
DDR_A_DQ_54 AD40
DDR_A_DQ_55 AC39
DDR_A_DQ_56 AB42
DDR_A_DQ_57 AB43
DDR_A_DQ_58 Y42
DDR_A_DQ_59 W42
DDR_A_DQ_60 AC40
DDR_A_DQ_61 AB39
DDR_A_DQ_62 AA41
DDR_A_DQ_63 Y45
DDR_A_DQS_0 BA6
DDR_A_DQS_1 BA11
DDR_A_DQS_2 BA15
DDR_A_DQS_3 AT21
DDR_A_DQS_4 AT43
DDR_A_DQS_5 AM43
DDR_A_DQS_6 AD43
DDR_A_DQS_7 AA42
DDR_A_DQS_8 AL38
DDR_A_DQSB_0 BC6
DDR_A_DQSB_1 AY11
DDR_A_DQSB_2 AY15
DDR_A_DQSB_3 AV21
DDR_A_DQSB_4 AT42
DDR_A_DQSB_5 AM42
DDR_A_DQSB_6 AD42
DDR_A_DQSB_7 AA44
DDR_A_DQSB_8 AL36
DDR_A_MA_0 BC36
DDR_A_MA_1 BB31
DDR_A_MA_2 BB30
DDR_A_MA_3 BB29
Table 28. MCH
Ballout Sorted By Name
Signal Name Ball #
PREVIOUS90919293949596979899100101102103NEXT
Address
Freelance Electronics
13197 Sandoval Street
Santa Fe Springs, CA 90670
 
Hours of Operation  (Holiday Hours)
Monday-Friday 7:30am-4:30pm PST
(Deadline for next day shipment 2:00pm PST)
Seal
Government Cage code#-1V4R6
Duns Number# 788130532
Certified Small Disadvantaged Business
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