Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

31761

Part # 31761
Description
Category RELAY
Availability In Stock
Qty 1
Qty Price
1 + $8.31832
Manufacturer Available Qty
ARROW HART
  • Shipping Freelance Stock: 1
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Direct Media Interface (DMI) RCRB
262 Datasheet
9.8 DMIVC1RCTL1—DMI VC1 Resource Control
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 20–23h
Default Value: 01000000h
Access: RW, RO
Size: 32 bits
This register controls the resources associated with PCI Express Virtual Channel 1.
Bit Access
Default
Value
Description
31 RW 0b
Virtual Channel 1 Enable (VC1E):
0 = Virtual Channel is disabled.
1 = Virtual Channel is enabled.
30:27 RO 0h Reserved
26:24 RW 001b
Virtual Channel 1 ID (VC1ID): This field assigns a VC ID to the VC resource.
Assigned value must be non-zero. This field can not be modified when the VC is
already enabled.
23:20 RO 0h Reserved
19:17 RW 000b
Port Arbitration Select (PAS): This field configures the VC resource to
provide a particular Port Arbitration service. Valid value for this field is a number
corresponding to one of the asserted bits in the Port Arbitration Capability field
of the VC resource.
16:8 RO 000h Reserved
7:1 RW 00h
Traffic Class / Virtual Channel 1 Map (TCVC1M): This field indicates the TCs
(Traffic Classes) that are mapped to the VC resource. Bit locations within this
field correspond to TC values.
For example, when bit 7 is set in this field, TC7 is mapped to this VC resource.
When more than one bit in this field is set, it indicates that multiple TCs are
mapped to the VC resource. To remove one or more TCs from the TC/VC Map of
an enabled VC, software must ensure that no new or outstanding transactions
with the TC labels are targeted at the given Link.
0RO0b
Traffic Class 0 / Virtual Channel 1 Map (TC0VC1M): Traffic Class 0 is
always routed to VC0.
Datasheet 263
Direct Media Interface (DMI) RCRB
9.9 DMIVC1RSTS—DMI VC1 Resource Status
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 26–27h
Default Value: 0002h
Access: RO
Size: 16 bits
This register reports the Virtual Channel specific status.
9.10 DMILCAP—DMI Link Capabilities
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 84–87h
Default Value: 00012C41h
Access: RO, RWO
Size: 32 bits
This register indicates DMI specific capabilities.
Bit Access
Default
Value
Description
15:2 RO 0000h Reserved
1RO1b
Virtual Channel 1 Negotiation Pending (VC1NP):
0 = The VC negotiation is complete.
1 = The VC resource is still in the process of negotiation (initialization or
disabling).
0 RO 0b Reserved
Bit Access
Default
Value
Description
31:18 RO 0000h Reserved
17:15 RWO 010b
L1 Exit Latency (L1SELAT): This field indicates the length of time this Port
requires to complete the transition from L1 to L0.
010 = 2 µs to less than 4 µs
All other encodings are reserved.
14:12 RWO 010b
L0s Exit Latency (L0SELAT): This field indicates the length of time this Port
requires to complete the transition from L0s to L0.
010 = 128 ns to less than 256 ns
All other encodings are reserved.
11:10 RO 11b Active State Link PM Support (ASLPMS): L0s & L1 entry supported.
9:4 RO 04h
Max Link Width (MLW): This field indicates the maximum number of lanes
supported for this link.
04h = x4
All other encodings are reserved.
3:0 RO 1h Max Link Speed (MLS): Hardwired to indicate 2.5 Gb/s.
Direct Media Interface (DMI) RCRB
264 Datasheet
9.11 DMILCTL—DMI Link Control
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 88–89h
Default Value: 0000h
Access: RW, RO
Size: 16 bits
This register allows control of DMI.
9.12 DMILSTS—DMI Link Status
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 8A–8Bh
Default Value: 0001h
Access: RO
Size: 16 bits
This register indicates DMI status.
§ §
Bit Access
Default
Value
Description
15:8 RO 00h Reserved
7RW0b
Extended Synch (EXTSYNC):
0 = Standard Fast Training Sequence (FTS).
1 = Forces the transmission of additional ordered sets when exiting the L0s
state and when in the Recovery state.
6:3 RO 0h Reserved
2RW0bFar-End Digital Loopback (FEDLB):
1:0 RW 00b
Active State Power Management Support (ASPMS): This field controls the
level of active state power management supported on the given link.
00 = Disabled
01 = L0s Entry Supported
10 = Reserved
11 = L0s and L1 Entry Supported
Bit Access
Default
Value
Description
15:4 RO 0s Reserved
3:0 RO 1h
Negotiated Speed (NSPD): This field indicates negotiated link speed.
1h = 2.5 Gb/s
All other encodings are reserved.
PREVIOUS8182838485868788899091929394NEXT